Efficient error correction code configurations for quasi-nonvolatile data retention by DRAMs

This paper presents analyses of various configurations of error correction codes for the purpose of reducing the parity area for quasi-nonvolatile data retention by DRAMs. By combining long and short error correction codes, we show that the parity area can be reduced to less than 1% of the total memory size, yet the system can offer comparable reliability and adaptability as an earlier design that requires 12.5% parity area. We also claim that even without using any area for parity data, the adaptive control of the DRAM refresh rate can reduce the total risk of data loss. Finally, we discuss an efficient decoder design for long RS codes.

[1]  Christof Paar,et al.  Efficient Algorithms for Elliptic Curve Cryptosystems , 1997, CRYPTO.

[2]  Y. Katayama,et al.  O(log/sub 2/ m) iterative algorithm for multiplicative inversion in GF(2/sup m/) , 2000, 2000 IEEE International Symposium on Information Theory (Cat. No.00CH37060).

[3]  Zhao Wu,et al.  Fault-tolerant refresh power reduction of DRAMs for quasi-nonvolatile data retention , 1999, Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99).

[4]  U. Schwiegelshohn,et al.  On-The-Fly Error Correction in Data Storage Channels , 1994, Digest of the Magnetic Recording Conference.

[5]  T. Itoh,et al.  A Fast Algorithm for Computing Multiplicative Inverses in GF(2^m) Using Normal Bases , 1988, Inf. Comput..

[6]  Yasunao Katayama,et al.  One-shot Reed-Solomon decoding for high-performance dependable systems , 2000, Proceeding International Conference on Dependable Systems and Networks. DSN 2000.

[7]  Eiji Fujiwara,et al.  Optimal two-level unequal error control codes for computer systems , 1996, Proceedings of Annual Symposium on Fault Tolerant Computing.

[8]  Yasunao Katayama,et al.  Design methodology for a one-shot Reed-Solomon encoder and decoder , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).