Parameter Extraction and SPICE Model Development for 4H-Silicon Carbide (SiC) Power MOSFET

A simple behavioral SPICE model for the SiC DIMOSFET is proposed based on the understanding of the power MOSFET device terminal behavior (Figure 1). SiC Power MOSFETs show a tremendous potential for high temperature electronics applications [1-3]. However, there are very few SPICE models are available for Computer aided simulations [4-5]. The aim of the model development is to reuse the available built-in FET models of the regular lateral MOS devices of the commercial SPICE simulator. The advantage of the model is the limited number of required parameters, which can readily be extracted from simple terminal measurements or from standard datasheets, using the algorithmic and empirical approach as followed in this model development. The SPICE parameters of the model are extracted from the test data. A Power DIMOSFET test device, fabricated in 4H-SiC, is tested with the collaboration of Cree Research Inc., Raleigh, North Carolina. The model especially considers silicon carbide material and process related parameters that affect the device performance. The model can be described as a sub-circuit within the same SPICE code and can be run in any commercial SPICE simulator. Since DIMOS is a power device, its channel length, width, and other device dimensions are big enough to neglect the second order effects in the model equations, and the simulation can be carried out as SPICE level 1 or level 2. The model can be used to simulate either p-channel or nchannel SiC power MOSFET devices over a wide range of currents and voltages. A custom DC measurement system is used to facilitate the DC characterization of the SiC-DIMOSFET test device (Figure 2). DC characterization includes the measurement of device output characteristics (ID vs VDS), transfer characteristics (ID vs VGS), small signal parameters such as transconductance (gm), output conductance (gd), output resistance (ro), mobility (µ), etc. A Hewlett Packard HP4145B Parameter Analyzer is used for two primary measurement tasks: measurement of the output characteristics and the transfer characteristics of the test device. A similar measurement system is also used to measure the capacitances such as gate-source capacitance (CGS), gate-drain capacitance (CGD), and drain-source capacitance (CDS). A Keithley 590 C-V analyzer is used to measure the capacitances. The parameters of the sub-circuit model are extracted from the device terminal characteristic measurements. The value of threshold voltage, VTO and process trans-conductance parameter, KP are obtained from Figure 3 and 4. Reverse voltage blocking diode saturation current, IS and source resistance, RS are calculated from block mode operation. Rdrift is obtained from high output current measurement. Oxide thickness, TOX, channel width, W, channel length, L, breakdown voltage, Vbreak are taken from datasheet of the test device. A chopper circuit is built on a test board to measure the switching characteristics of the test device. An input pulse train of square-wave (0-5V peak-peak) for the frequency range of (1 kHz-50 kHz) is applied to the input, and the corresponding output is observed. The switching behavior is also simulated using the developed sub-circuit model. The measured wave-shapes and the simulated wave-shapes at 10 kHz are shown in Figure 5 and 6, respectively. The simulation results matched very well with the measurement. It is observed from the switching characteristics that the device can be operated for the frequency range of (0-20 kHz). The developed SPICE model can be used reliably in circuit simulation for the low voltage low power applications.