A novel parasitic insensitive switched-capacitor technique for realizing very large time constants

A novel technique for realizing very large time constant switched-capacitor integrators is presented. The integrators are area-efficient and are insensitive to parasitic capacitances. A 60-Hz notch filter working from a 128-kHz clock has been designed using these integrators and implemented in a 1.5 mu m CMOS technology.<<ETX>>