CAS-BUS: a scalable and reconfigurable test access mechanisms for systems on a chip

This paper describes CAS-BUS, a P1500 compatible test access mechanism for systems on a chip. The TAM architecture is made up of a core access switch (CAS) and a test bus. The TAM characteristics are its flexibility, scalability and reconfigurability. A CAS generator has been developed, and some results are provided in the paper.

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