LTE系统物理层下行链路Turbo编码器的FPGA 设计与实现 The Design and Implementation of Turbo Coder in the Physical Down-Link of LTE Systems Based on FPGA

针对LTE系统物理层下行链路的Turbo编码器进行了研究，分别确定和设计了组成编码器的四个模块——交织、分量编码、删余和复接的工作方式和电路图。在完成四个模块单独仿真测试的基础上，对各模块之间的连接进行了整体设计和调试，将交织器、分量编码器、删余器三个模块组合成一个模块，并将其输出的校验序列与原码输入序列一同输入到复接器中，实现了最后的编码序列输出。The Turbo coder in the down-link of physical layer for LTE systems is studied in this paper. The four modules of Turbo coder, which are interweave, component coding, puncture and multiplex, are analyzed and designed. The connection of the four modules is developed after simulating and adjusting the four mo- dules. Then the three modules of interweave, component coding and puncture are combined into one module. The check code output from this module and the original code are together put into the multiplexer, and fi- nally the coding sequences are output.