An 8/spl times/8-b nRERL serial multiplier for ultra-low-power applications
暂无分享,去创建一个
An 8/spl times/8-b nRERL serial multiplier is implemented in a 0.6-/spl mu/m n-well 3-metal CMOS process. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit, which can be operated at the leakage-current level for ultra-low-energy applications. Measurement results showed that the nRERL serial multiplier consumed only 0.9% of the energy dissipation by the static CMOS type at the operating frequency 100 kHz at 5 V, where its adiabatic and leakage losses were about equal.
[1] Joonho Lim,et al. Reversible Energy Recovery Logic Circuits and Its 8-Phase Clocked Power Generator for Ultra-Low-Power Applications , 1999 .
[2] Soo-Ik Chae,et al. nMOS reversible energy recovery logic for ultra-low-energy applications , 2000, IEEE Journal of Solid-State Circuits.
[3] Soo-Ik Chae,et al. A 16-bit carry-lookahead adder using reversible energy recovery logic for ultra-low-energy systems , 1999 .
[4] Keshab K. Parhi. A systematic approach for design of digit-serial signal processing architectures , 1991 .