Design and optimization of CMOS OTA with gm/Id methodology using EKV model for RF frequency synthesizer application.

In this paper, we will focus exclusively in the obtention of optimum power designs, using the (gm/ID) methodology. The introduction of a simple, gain bandwidth driven, automatic design algorithm for OTA is used as a starting point for the review of more advanced design methodology. This review leads to an automatic synthesis algorithm developed in MATLAB which systematically transits from high level specifications (total settling time) to the amplifier specifications (gain-bandwidth, slew rate) and then to transistor sizing. The design obtained complies with the high level specifications with minimum power consumption. Two main lines of study are followed here. The study of architectures for input and output stages that are suitable to be used on different environmental conditions, allow us to obtain an opamp cell that can be used in an ample spectrum of low-voltage, micropower applications. The second line of study in analog design reuse focuses on the possibility of circuit performance tuning through the bias current, where preliminary results have already been obtained . The idea in this technique is to tune the power-speed trade off of the opamp cell using the bias current while keeping the performance in all other aspects.