Electromagnetic modeling of interconnections in three-dimensional integration

[1]  H. A. Wheeler.  Formulas for the Skin Effect , 1942, Proceedings of the IRE.

[2]  Hai-Young Lee.  Wideband characterization of mutual coupling between high density bonding wires , 1994, IEEE Microwave and Guided Wave Letters.

[3]  H. Hasegawa,et al.  Properties of Microstrip Line on Si-SiO/sub 2/ System , 1971 .

[4]  Alberto L. Sangiovanni-Vincentelli,et al.  Using conduction modes basis functions for efficient electromagnetic anaysis of on-chip and off-chip interconnect , 2001, DAC '01.

[5]  Joungho Kim,et al.  Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV) , 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

[6]  So-Ra Kim,et al.  8Gb 3D DDR3 DRAM using through-silicon-via technology , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[7]  T. Kenny,et al.  Process compatible polysilicon-based electrical through-wafer interconnects in silicon substrates , 2002 .

[8]  M.V.G. das Neves,et al.  Accurate evaluation of indoor triplex cable capacitances taking conductor proximity effects into account , 2006 .

[9]  Madhavan Swaminathan,et al.  Use of the finite element method for the modeling of multi-layered power/ground planes with small features , 2009, 2009 59th Electronic Components and Technology Conference.

[10]  R. Scharstein,et al.  Capacitance of a tube , 2007 .

[11]  W. Press,et al.  Numerical Recipes in C++: The Art of Scientific Computing (2nd edn)1 Numerical Recipes Example Book (C++) (2nd edn)2 Numerical Recipes Multi-Language Code CD ROM with LINUX or UNIX Single-Screen License Revised Version3 , 2003 .

[12]  J. L. Prince,et al.  Frequency response characteristics of reference plane effective inductance and resistance [IC packaging] , 1999 .

[13]  L. Verolino,et al.  Capacitance of a hollow cylinder , 1995 .

[14]  T. Sarkar,et al.  Wideband frequency-domain characterization of FR-4 and time-domain causality , 2001, IEEE Transactions on Electromagnetic Compatibility.

[15]  Chichyang Chen,et al.  Electrical characterization and structure investigation of quad flat non-lead package for RFIC applications , 2003 .

[16]  R. Bashirullah,et al.  An active crosstalk reduction technique for parallel high-speed links in low cost wirebond BGA packages , 2008, 2008 IEEE-EPEP Electrical Performance of Electronic Packaging.

[17]  Albert E. Ruehli,et al.  Retarded models for PC board interconnects-or how the speed of light affects your SPICE circuit simulation , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[18]  M. Swaminathan,et al.  Electromagnetic Modeling of Through-Silicon Via (TSV) Interconnections Using Cylindrical Modal Basis Functions , 2010, IEEE Transactions on Advanced Packaging.

[19]  A. E. Ruehii.  Inductance Calculations in a Complex Integrated Circuit Environment , 2002 .

[20]  Joungho Kim,et al.  40-Gb/s Package Design Using Wire-Bonded Plastic Ball Grid Array , 2008, IEEE Transactions on Advanced Packaging.

[21]  P. Silvester,et al.  Modal network theory of skin effect in flat conductors , 1966 .

[22]  K. Takahashi,et al.  Through Silicon Via and 3-D Wafer/Chip Stacking Technology , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

[23]  Ki Jin Han,et al.  Eye-Pattern Design for High-Speed Differential Links Using Extended Passive Equalization , 2008, IEEE Transactions on Advanced Packaging.

[24]  Katsuyuki Sakuma,et al.  3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections , 2008, IBM J. Res. Dev..

[25]  Marian K. Kazimierczuk,et al.  Stray capacitances of single-layer solenoid air-core inductors , 1999 .

[26]  Rao Tummala,et al.  Fundamentals of Microsystems Packaging , 2001 .

[27]  U. Goebel.  DC to 100 GHz chip-to-chip interconnects with reduced tolerance sensitivity by adaptive wirebonding , 1994, Proceedings of 1994 IEEE Electrical Performance of Electronic Packaging.

[28]  F. Alimenti,et al.  Quasi static analysis of microstrip bondwire interconnects , 1995, Proceedings of 1995 IEEE MTT-S International Microwave Symposium.

[29]  J. Mayer.  Advanced packaging , 1986 .

[30]  Z. Rahman,et al.  Architectural implications and process development of 3-D VLSI Z-axis interconnects using through silicon vias , 2005, IEEE Transactions on Advanced Packaging.

[31]  Giulio Antonini,et al.  On modeling accuracy of EMI problems using PEEC , 2003, 2003 IEEE Symposium on Electromagnetic Compatibility. Symposium Record (Cat. No.03CH37446).

[32]  G. Leonhardt,et al.  Electromagnetic simulation of bonding wires and comparison with wide band measurements , 2000 .

[33]  Brian Young.  Digital Signal Integrity: Modeling and Simulation with Interconnects and Packages , 2000 .

[34]  Madhavan Swaminathan,et al.  Wideband electrical modeling of large three-dimensional interconnects using accelerated generation of partial impedances with cylindrical conduction mode basis functions , 2008, 2008 IEEE MTT-S International Microwave Symposium Digest.

[35]  Madhavan Swaminathan,et al.  Polarization mode basis functions for modeling insulator-coated through-silicon via (TSV) interconnections , 2009, 2009 IEEE Workshop on Signal Propagation on Interconnects.

[36]  L. Daniel,et al.  Interconnect electromagnetic modeling using conduction modes as global basis functions , 2000, IEEE 9th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.00TH8524).

[37]  Roberto Sorrentino,et al.  Modeling and characterization of the bonding-wire interconnection , 2001 .

[38]  S. Grivet-Talocia,et al.  On the generation of large passive macromodels for complex interconnect structures , 2006, IEEE Transactions on Advanced Packaging.

[39]  Clayton Paul,et al.  Computation of the Capacitance Matrix for Systems of Dielectric-Coated Cylindrical Conductors , 1975, IEEE Transactions on Electromagnetic Compatibility.

[40]  D. Cheng.  Field and wave electromagnetics , 1983 .

[41]  Cheng-Kok Koh,et al.  Exact closed-form formula for partial mutual inductances of rectangular conductors , 2003 .

[42]  Said F. Al-Sarawi,et al.  A Review of 3-D Packaging Technology , 1998 .

[43]  C. Wollenberg,et al.  Analysis of 3-D interconnect structures with PEEC using SPICE , 1999 .

[44]  A. Ruehli,et al.  Efficient Capacitance Calculations for Three-Dimensional Multiconductor Systems , 1973 .

[45]  S. Wane,et al.  Compact equivalent circuit derivation of bond wire arrays for power and signal integrity analysis , 2007, 2007 European Microwave Conference.

[46]  S. Ray,et al.  Closed form expression for mutual partial inductance between two skewed linear current segments , 1999, IEEE Antennas and Propagation Society International Symposium. 1999 Digest. Held in conjunction with: USNC/URSI National Radio Science Meeting (Cat. No.99CH37010).

[47]  M. Swaminathan,et al.  Electrical modeling of wirebonds in stacked ICs using cylindrical conduction mode basis functions , 2008, 2008 58th Electronic Components and Technology Conference.

[48]  Giulio Antonini,et al.  Fast Multipole and Multifunction PEEC Methods , 2003, IEEE Trans. Mob. Comput..

[49]  M. Swaminathan,et al.  Multilayered Finite-Difference Method (MFDM) for Modeling of Package and Printed Circuit Board Planes , 2007, IEEE Transactions on Electromagnetic Compatibility.

[50]  G. Antonini,et al.  PEEC Modeling of Dispersive and Lossy Dielectrics , 2008, IEEE Transactions on Advanced Packaging.

[51]  Guo-Lin Li,et al.  Consider the losses of dielectric in PEEC , 2002, 2002 3rd International Conference on Microwave and Millimeter Wave Technology, 2002. Proceedings. ICMMT 2002..

[52]  M. Leone,et al.  PEEC Formulation Based on Dyadic Green's Functions for Layered Media in the Time and Frequency Domains , 2008, IEEE Transactions on Electromagnetic Compatibility.

[53]  R. Mittra,et al.  Computational Methods for Electromagnetics , 1997 .

[54]  A. Ruehli,et al.  Circuit models for three-dimensional geometries including dielectrics , 1992 .

[55]  H. Patterson.  Analysis of ground bond wire arrays for RFICs , 1997, 1997 IEEE MTT-S International Microwave Symposium Digest.

[56]  W. Gander,et al.  Adaptive Quadrature—Revisited , 2000 .

[57]  Mattan Kamon,et al.  FastHenry: A Multipole-Accelerated 3-D Inductance Extraction Program , 1993, 30th ACM/IEEE Design Automation Conference.

[58]  M. Abramowitz,et al.  Handbook of Mathematical Functions With Formulas, Graphs and Mathematical Tables (National Bureau of Standards Applied Mathematics Series No. 55) , 1965 .

[59]  S. Adee,et al.  the data: 37 Years of Moore's Law , 2008, IEEE Spectrum.

[60]  H. Guckel,et al.  A Parallel-Plate Waveguide Approach to Microminiaturized, Planar Transmission Lines for Integrated Circuits , 1967 .

[61]  Joungho Kim,et al.  High Frequency Electrical Model of Through Wafer Via for 3-D Stacked Chip Packaging , 2006, 2006 1st Electronic Systemintegration Technology Conference.

[62]  D. Fink,et al.  41Ca: past, present and future , 1990 .

[63]  Hai-Young Lee,et al.  Wideband characterization of a typical bonding wire for microwave and millimeter-wave integrated circuits , 1995 .

[64]  Yuji Yano,et al.  Triple-chip stacked CSP , 2000, 2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070).

[65]  Alberto L. Sangiovanni-Vincentelli,et al.  Proximity templates for modeling of skin and proximity effects on packages and high frequency interconnect , 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

[66]  Madhavan Swaminathan,et al.  Electric field integral equation combined with cylindrical conduction mode basis functions for electrical modeling of three-dimensional interconnects , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[67]  Min-Hang Weng,et al.  Loss characteristics of silicon substrate with different resistivities , 2006 .

[68]  V. Kripesh,et al.  Three-dimensional system-in-package using stacked silicon platform technology , 2005, IEEE Transactions on Advanced Packaging.

[69]  Andrew A. O. Tay,et al.  The effect of wirebond geometry and die setting on wire sweep , 1995 .

[70]  A. Semlyen,et al.  Rational approximation of frequency domain responses by vector fitting , 1999 .

[71]  Ki Jin Han,et al.  Parasitic extraction of interconnections in 3-D packaging using mixed potential integral equation with global basis functions , 2008, 2008 Asia-Pacific Microwave Conference.

[72]  A. Bischoff,et al.  New Bonding Wire for Fine Pitch Applications , 2007, 2007 9th Electronics Packaging Technology Conference.

[73]  Andreas C. Cangellaris,et al.  Progress in the methodologies for the electrical modeling of interconnects and electronic packages , 2001, Proc. IEEE.

[74]  A. Weisshaar,et al.  CAD-oriented equivalent-circuit modeling of on-chip interconnects on lossy silicon substrate , 2000 .

[75]  Roberto Suaya,et al.  Efficient implementation of conduction modes for modelling skin effect , 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

[76]  Ethan Mollick,et al.  Establishing Moore's Law , 2006, IEEE Annals of the History of Computing.

[77]  J.A. Yeh,et al.  Radio frequency characterization of bonding wire interconnections in a molded chip , 2004, 2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).

[78]  B. N. Das,et al.  Capacitance of transmission line of parallel cylinders with variable radial width , 1998 .

[79]  A. Ruehli.  Equivalent Circuit Models for Three-Dimensional Multiconductor Systems , 1974 .

[80]  李幼升,et al.  Ph , 1989 .

[81]  T. Sarkar,et al.  Analysis of Multiconductor Transmission Lines , 1988, 31st ARFTG Conference Digest.

[82]  Ki Jin Han,et al.  Cylindrical Conduction Mode Basis Functions for Modeling of Inductive Couplings in System-in-Package (SiP) , 2007, 2007 IEEE Electrical Performance of Electronic Packaging.

[83]  Frederick Warren Grover,et al.  Inductance Calculations: Working Formulas and Tables , 1981 .

[84]  M. Swaminathan,et al.  Construction of broadband passive macromodels from frequency data for simulation of distributed interconnect networks , 2004, IEEE Transactions on Electromagnetic Compatibility.

[85]  Ki Jin Han,et al.  Analysis of Horizontal and Vertical Couplings in Bonding Wire Interconnections Using EFIE with Cylindrical Conduction Mode Basis Functions , 2008, 2008 12th IEEE Workshop on Signal Propagation on Interconnects.

[86]  Li Li,et al.  Parameterized models for a RF chip-to-substrate interconnect , 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

[87]  Chi-Taou Tsai,et al.  Package inductance characterization at high frequencies , 1994 .

[88]  W. Eisenstadt,et al.  Combined differential and common-mode scattering parameters: theory and simulation , 1995 .

[89]  Katsuyuki Sakuma,et al.  Three-dimensional silicon integration , 2008, IBM J. Res. Dev..

[90]  Allen Taflove,et al.  Computational Electrodynamics the Finite-Difference Time-Domain Method , 1995 .

[91]  S. Yoon,et al.  High RF performance TSV silicon carrier for high frequency application , 2008, 2008 58th Electronic Components and Technology Conference.

[92]  Xiaoning Qi,et al.  A fast 3D modeling approach to electrical parameters extraction of bonding wires for RF circuits , 2000 .

[93]  E. M. Deeley,et al.  Surface impedance near edges and corners in three-dimensional media , 1990 .

[94]  R.R. Tummala.  Moore's law meets its match (system-on-package) , 2006, IEEE Spectrum.

[95]  R.R. Tummala,et al.  Packaging: past, present and future , 2005, 2005 6th International Conference on Electronic Packaging Technology.