Design andUseofFault Simulation forSaturn Computer Design

FAULTS faults, plusanautomated statistical analysis ofintermittent fault simulation results, will bepresented. TheIBM7090execution timeofacompiled logic simulator can SIMULATOR beprohibitive. To minimize running timeseveral programming techniques wereutilized, including logic blockordering (toallow single passsimulation), parallel fault simulation, stimulus bypassing, SIMULATION andfunctional simulation. Thesetechniques aredescribed. RESULTS Several special formsofsimulator output weredeveloped. The useofthis output andtheapplications ofthesimulator arepresented, including design verfication, testprogram evaluation, generation of atestpoint catalog, disagreement detector network evaluation, dis