Fast Nonlinear Dynamic Compact Thermal Modeling With Multiple Heat Sources in Ultra-Thin Chip Stacking Technology
暂无分享,去创建一个
Alessandro Magnani | Lorenzo Codecasa | Vincenzo d'Alessandro | Niccolo Rinaldi | V. d’Alessandro | N. Rinaldi | L. Codecasa | A. Magnani
[1] Sachin S. Sapatnekar,et al. Placement of thermal vias in 3-D ICs using various thermal objectives , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[2] Baekyoung Sung. Thermal Enhancement of Stacked Dies Using Thermal Vias , 2006 .
[3] J. C. Jaeger,et al. Conduction of Heat in Solids , 1952 .
[4] E. Beyne,et al. 3D Embedding and Interconnection of Ultra Thin (≪ 20 μm) Silicon Dies , 2007, 2007 9th Electronics Packaging Technology Conference.
[5] Thomas Hélie,et al. On the convergence of Volterra series of finite dimensional quadratic MIMO systems , 2008, Int. J. Control.
[6] J. Samitier,et al. Dynamic compact thermal models with multiple power sources: application to an ultrathin chip stacking technology , 2005, IEEE Transactions on Advanced Packaging.
[7] L. Codecasa,et al. Compact Models of Dynamic Thermal Networks with Many Heat Sources , 2007, IEEE Transactions on Components and Packaging Technologies.
[8] G. Roelkens,et al. Thin-film devices fabricated with benzocyclobutene adhesive wafer bonding , 2005, Journal of Lightwave Technology.
[9] C. Mark Johnson,et al. Design Tools for Rapid Multidomain Virtual Prototyping of Power Electronic Systems , 2016, IEEE Transactions on Power Electronics.
[10] Alessandro Magnani,et al. Compact Dynamic Modeling for Fast Simulation of Nonlinear Heat Conduction in Ultra-Thin Chip Stacking Technology , 2014, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[11] Alessandro Magnani,et al. Dynamic Electrothermal Macromodeling: an Application to Signal Integrity Analysis in Highly Integrated Electronic Systems , 2013, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[12] W. Rugh. Nonlinear System Theory: The Volterra / Wiener Approach , 1981 .
[13] Chia-Lung Chang,et al. Thermal analysis of QFN packages using finite element method , 2004, 5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems, 2004. EuroSimE 2004. Proceedings of the.
[14] Alessandro Magnani,et al. Structure-preserving approach to multi-port dynamic compact models of nonlinear heat conduction , 2015, Microelectron. J..
[15] Brian T. Helenbrook,et al. Thermal modeling for FinFET NAND gate circuits using a multi-block reduced-order model , 2015, 2015 21st International Workshop on Thermal Investigations of ICs and Systems (THERMINIC).
[16] Salvatore Russo,et al. Thermal Effects in Thin Silicon Dies: Simulation and Modelling , 2011 .
[17] M. N. Özişik. Boundary value problems of heat conduction , 1989 .
[18] Hao Yu,et al. Simultaneous power and thermal integrity driven via stapling in 3D ICs , 2006, ICCAD.
[19] Paolo Maffezzoni,et al. Compact modeling of electrical devices for electrothermal analysis , 2003 .
[20] Jie Meng,et al. Optimizing energy efficiency of 3-D multicore systems with stacked DRAM under power and thermal constraints , 2012, DAC Design Automation Conference 2012.
[21] Philip Garrou,et al. Introduction to 3D Integration , 2008 .
[22] M. Paggi,et al. Model order reduction applied to heat conduction in photovoltaic modules , 2015, 1505.05361.
[24] Olivier Vendier,et al. Thermal modeling and management in ultrathin chip stack technology , 2002 .
[25] Andrea Irace,et al. Circuit-Based Electrothermal Simulation of Power Devices by an Ultrafast Nonlinear MOR Approach , 2016, IEEE Transactions on Power Electronics.
[26] Li Zheng,et al. A Simulation Tool for Rapid Investigation of Trends in 3-DIC Performance and Power Consumption , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[27] Eby G. Friedman,et al. Experimental Analysis of Thermal Coupling in 3-D Integrated Circuits , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[28] Zheyao Wang,et al. Thermal Conductivity Enhancement of Benzocyclobutene With Carbon Nanotubes for Adhesive Bonding in 3-D Integration , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.
[29] A. Shakouri,et al. Fast thermal simulations of vertically integrated circuits (3D ICs) including thermal vias , 2012, 13th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems.
[30] Andrzej Napieralski,et al. Investigation of localized thermal vias for temperature reduction in 3D multicore processors , 2015, 2015 22nd International Conference Mixed Design of Integrated Circuits & Systems (MIXDES).
[31] Yusuf Leblebici,et al. Through Silicon Via-Based Grid for Thermal Control in 3D Chips , 2009, NanoNet.
[32] Tomas Sauer,et al. Polynomial interpolation in several variables , 2000, Adv. Comput. Math..
[33] Jason Cong,et al. Thermal via planning for 3-D ICs , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..
[34] Li Shang,et al. Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[35] W. B. Joyce,et al. Thermal resistance of heat sinks with temperature-dependent conductivity , 1975 .
[36] Alessandro Magnani,et al. Fast novel thermal analysis simulation tool for integrated circuits (FANTASTIC) , 2014, 20th International Workshop on Thermal Investigations of ICs and Systems.
[37] Y. Notay. An aggregation-based algebraic multigrid method , 2010 .
[38] M. Rencz,et al. Studies on the nonlinearity effects in dynamic compact model generation of packages , 2004, IEEE Transactions on Components and Packaging Technologies.
[39] Madhavan Swaminathan,et al. Optimization of 3D stack for electrical and thermal integrity , 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.