In the paper, we elaborate our recent work on monolithic (by epitaxial growth) and heterogeneous (by adhesive bonding) integration techniques that may pave the path to the final solutions of IIIV lasers on silicon in different scenarios. In the case of on-chip optical interconnects, a large number of IIIV lasers with high integration density are highly demanded. By using a buffer-less selective growth technique, we are able to grow submicron-sized InP waveguides directly on silicon. All the dislocations are confined at the interface between Si and InP, which leads to the successful demonstration of a distributed feedback (DFB) laser array with good uniformity. Thanks to the minimized buffer layer thickness (20 nm) and the standard top-down laser process flow, it is possible to demonstrate very high integration density of IIIV lasers on silicon. Recently, by growing InGaAs/InP heterostructures on the virtual lattice-matched InP-on-Si template, we are able to achieve room-temperature lasing at communication wavelength range. On the other hand, the relatively mature bonding based heterogeneous integration technology has been well developed over the last decade, and the integration of various laser configurations on silicon lead to more system level demonstrations. Here, we present our recent work on IIIV-on-Si mode-locked lasers. Thanks to the extremely low silicon waveguide loss, we are able to achieve record-low repetition rate of 1GHz, with an extremely low RF linewidth (sub-kHz). Such devices are promising for applications such as spectroscopy, microwave photonics etc.