VLSI computing architectures for Ising model simulation

Abstract Efficient VLSI architectures for parallel computations involved in the Monte Carlo simulation of the Ising model are presented. The architecture provides an extremely area-efficient, spatially-distributed set of pseudorandom numbers, which are required in the local nondeterministic decisions at the various sites in the lattice, using pseudorandom number generators based upon cellular automata (CA). This provides a highly parallel fine-grained VLSI architecture specifically aimed at Ising model computations. It is shown that the time-intensive task of sampling the Ising configurations is optimised by this approach. Therefore, these architectures can be considered to form the basis for Ising computers which could act as coprocessors for computational statistical mechanics in much the same manner as a floating-point accelerator is used to speed arithmetic computation. These hardware experts can be used to report pertinent information such as the magnetisation to a host computer. It is demonstrated that this architecture can provide a speedup of several orders of magnitude over conventional Monte Carlo simulation and are also an improvement over previous parallel computations. Measurements from a prototype constructed using a custom VLSI chip implementation indicate that a 1000 × 1000 Ising lattice can be completely updated and lattice energy and magnetisation calculated in less than 1 μsec. The validity of this approach is verified by computer simulation of the new architecture which yielded the correct Ising model critical exponents and lattice energy and magnetisation for the two-dimensional square lattice. This provides a stringent test against long term correlation effects in the CA-based distributed random numbers over and above our earlier verification using standard empirical random number tests.