Algorithms and Architectures

Digital signal processing (DSP) algorithms exhibit an increasing need for the e cient implementation of complex arithmetic operations. The computation of trigonometric functions, coordinate transformations or rotations of complex valued phasors is almost naturally involved with modern DSP algorithms. Popular application examples are algorithms used in digital communication technology and in adaptive signal processing. While in digital communications, the straightforward evaluation of the cited functions is important, numerous matrix based adaptive signal processing algorithms require the solution of systems of linear equations, QR factorization or the computation of eigenvalues, eigenvectors or singular values. All these tasks can be e ciently implemented using processing elements performing vector rotations. The COordinate Rotation DIgital Computer algorithm (CORDIC) o ers the opportunity to calculate all the desired functions in a rather simple and elegant way. The CORDIC algorithm was rst introduced by Volder [1] for the computation of trigonometric functions, multiplication, division and datatype conversion, and later on generalized to hyperbolic functions by Walther [2]. Two basic CORDIC modes are known leading to the computation of di erent functions, the rotation mode and the vectoring mode. For both modes the algorithm can be realized as an iterative sequence of additions/subtractions and shift operations, which are rotations by a xed rotation angle (sometimes called microrotations) but with variable rotation direction. Due to the simplicity of the involved operations the CORDIC algorithm is very well

[1]  T. G. Noll.  Carry-save arithmetic for high-speed digital signal processing , 1990, IEEE International Symposium on Circuits and Systems.

[2]  Henk J. Sips,et al.  On-line CORDIC algorithms , 1989, Proceedings of 9th Symposium on Computer Arithmetic.

[3]  R. Kunemund,et al.  CORDIC Processor with Carry-Save Architecture , 1990, ESSCIRC '90: Sixteenth European Solid-State Circuits Conference.

[4]  Hironori Yamauchi,et al.  A 50-MHz CMOS geometrical mapping processor , 1989 .

[5]  Charles E. Leiserson,et al.  Optimizing Synchronous Circuitry by Retiming (Preliminary Version) , 1983 .

[6]  Dan H. Daggett,et al.  Decimal-Binary Conversions in CORDIC , 1959, IRE Trans. Electron. Comput..

[7]  Behrooz Pamami,et al.  Generalized Signed-Digit Number Systems : A Unifying Framework for Redundant Number Representations , 1990 .

[8]  Kai Hwang,et al.  Computer arithmetic: Principles, architecture, and design , 1979 .

[9]  Dirk Timmermann,et al.  Low Latency Time CORDIC Algorithms , 1992, IEEE Trans. Computers.

[10]  Yu Hen Hu,et al.  A novel implementation of a chirp Z-transform using a CORDIC processor , 1990, IEEE Trans. Acoust. Speech Signal Process..

[11]  Paul Jespers,et al.  A new carry-free division algorithm and its application to a single-chip 1024-b RSA processor , 1989 .

[12]  Jean-Michel Muller,et al.  Computing Functions cos^{-1} and sin^{-1} Using Cordic , 1993, IEEE Trans. Computers.

[13]  Jeong-A Lee,et al.  Constant-Factor Redundant CORDIC for Angle Calculation and Rotation , 1992, IEEE Trans. Computers.

[14]  Xiaobo Sharon Hu,et al.  Expanding the Range of Convergence of the CORDIC Algorithm , 1991, IEEE Trans. Computers.

[15]  J. S. Walther,et al.  A unified algorithm for elementary functions , 1899, AFIPS '71 (Spring).

[16]  Milos D. Ercegovac,et al.  Implementation of fast angle calculation and rotation using on-line CORDIC , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[17]  Bedrich J. Hosticka,et al.  Modified CORDIC algorithm with reduced iterations , 1989 .

[18]  Jeong-A Lee,et al.  On-Line CORDIC For Generalized Singular Value Decomposition(GSVD) , 1989, Photonics West - Lasers and Applications in Science and Engineering.

[19]  Alvin M. Despain,et al.  Fourier Transform Computers Using CORDIC Iterations , 1974, IEEE Transactions on Computers.

[20]  Shuzo Yajima,et al.  Redundant CORDIC Methods with a Constant Scale Factor for Sine and Cosine Computation , 1991, IEEE Trans. Computers.

[21]  D. Schmitt-Landsiedel,et al.  A Pipelined 330 MHz Multiplier , 1985, ESSCIRC '85: 11th European Solid-State Circuits Conference.

[22]  Shuzo Yajima,et al.  A hardware algorithm for computing sine and cosine using redundant binary representation , 1987, Systems and Computers in Japan.

[23]  Heinrich Meyr,et al.  The Differential CORDIC Algorithm: Constant Scale Factor Redundant Implementation without Correcting Iterations , 1996, IEEE Trans. Computers.

[24]  Heinrich Meyr,et al.  High speed bit-level pipelined architectures for redundant CORDIC implementation , 1992, [1992] Proceedings of the International Conference on Application Specific Array Processors.

[25]  Jack E. Volder.  The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..

[26]  Tomás Lang,et al.  Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD , 1990, IEEE Trans. Computers.

[27]  Joseph R. Cavallaro,et al.  Floating point CORDIC for matrix computations , 1988, Proceedings 1988 IEEE International Conference on Computer Design: VLSI.

[28]  Yu Hen Hu,et al.  CALF: a CORDIC adaptive lattice filter , 1992, [Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[29]  H. De Man,et al.  Automated synthesis of a high speed Cordic algorithm with the Cathedral-III compilation system , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[30]  Xiaobo Sharon Hu,et al.  A neglected error source in the CORDIC algorithm , 1993, 1993 IEEE International Symposium on Circuits and Systems.

[31]  Norman R. Scott.  Computer Number Systems and Arithmetic , 1984 .

[32]  Ed F. Deprettere,et al.  Pipelined cordic architectures for fast VLSI filtering and array processing , 1984, ICASSP.

[33]  Joseph R. Cavallaro,et al.  CORDIC arithmetic for an SVD processor , 1987, 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH).

[34]  Jean-Michel Muller,et al.  The CORDIC Algorithm: New Results for Fast VLSI Implementation , 1993, IEEE Trans. Computers.

[35]  Hassan Masud Ahmed.  Signal processing algorithms and architectures , 1982 .

[36]  Tomás Lang,et al.  CORDIC-Based Computation of ArcCos , 2000, J. VLSI Signal Process..

[37]  Y.H. Hu,et al.  CORDIC-based VLSI architectures for digital signal processing , 1992, IEEE Signal Processing Magazine.