Processor design for portable systems

Processors used in portable systems must provide highly energy-efficient operation, due to the importance of battery weight and size, without compromising high performance when the user requires it. The user-dependent modes of operation of a processor in portable systems are described and separate metrics for energy efficiency for each of them are found to be required. A variety of well known low-power techniques are re-evaluated against these metrics and in some cases are not found to be appropriate leading to a set of energy-efficient design principles. Also, the importance of idle energy reduction and the joint optimization of hardware and software will be examined for achieving the ultimate in low-energy, high-performance design.

[1]  Miss A.O. Penney (b) , 1974, The New Yale Book of Quotations.

[2]  Theodore I. Kamins,et al.  Device Electronics for Integrated Circuits , 1977 .

[3]  H. Grubin The physics of semiconductor devices , 1979, IEEE Journal of Quantum Electronics.

[4]  Hendrikus J. M. Veendrick,et al.  Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits , 1984 .

[5]  David L. Pulfrey,et al.  A comparison of CMOS circuit techniques: differential cascode voltage switch logic versus conventional logic , 1987 .

[6]  Michael D. Smith,et al.  Limits on multiple instruction issue , 1989, ASPLOS 1989.

[7]  Norman P. Jouppi,et al.  Available instruction-level parallelism for superscalar and superpipelined machines , 1989, ASPLOS III.

[8]  Mike Johnson,et al.  Superscalar microprocessor design , 1991, Prentice Hall series in innovative technology.

[9]  David W. Wall,et al.  Limits of instruction-level parallelism , 1991, ASPLOS IV.

[10]  Earl E. Swartzlander,et al.  Optimizing Arithmetic Elements For Signal Processing , 1992, Workshop on VLSI Signal Processing.

[11]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[12]  John David Bunda Instruction-processing optimization techniques for VLSI microprocessors , 1993, UTCS publications.

[13]  Donald S. Fussell,et al.  16-bit vs. 32-bit instructions for pipelined microprocessors , 1993, ISCA '93.

[14]  Scott Shenker,et al.  Scheduling for reduced CPU energy , 1994, OSDI '94.

[15]  Mani B. Srivastava,et al.  Energy efficient programmable computation , 1994, Proceedings of 7th International Conference on VLSI Design.

[16]  Anantha P. Chandrakasan,et al.  A low power chipset for portable multimedia applications , 1994, Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.

[17]  P. Freet The SH microprocessor: 16-bit fixed length instruction set provides better power and die size , 1994, Proceedings of COMPCON '94.

[18]  Anantha P. Chandrakasan,et al.  A low-power chipset for a portable multimedia I/O terminal , 1994 .

[19]  E. Nuckolls,et al.  A 1 watt 68040-compatible microprocessor , 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.

[20]  Low power hardware for a high performance PDA , 1994, Proceedings of COMPCON '94.

[21]  Robert W. Brodersen,et al.  A low-voltage CMOS DC-DC converter for a portable battery-operated system , 1994, Proceedings of 1994 Power Electronics Specialist Conference - PESC'94.

[22]  Hector Sanchez,et al.  The PowerPC 603 microprocessor: a low-power design for portable applications , 1994, Proceedings of COMPCON '94.

[23]  M. Horowitz,et al.  Low-power digital design , 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.

[24]  J. Lundberg,et al.  A 15- 150mhz, All-Digital Phase-Locked Loop with 50-Cycle Lock Time for High-Performance Low-Power Microprocessors , 1994, Proceedings of 1994 IEEE Symposium on VLSI Circuits.

[25]  Mary Jane Irwin,et al.  Power-delay characteristics of CMOS adders , 1994, IEEE Trans. Very Large Scale Integr. Syst..

[26]  T. Ikeda ThinkPad low-power evolution , 1995, 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers.

[27]  S. Kunii Means of realizing long battery life in portable PCs , 1995, 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers.

[28]  Jacob R. Lorch,et al.  A complete picture of the energy consumption of a portable computer , 1995 .

[29]  M. Horowitz,et al.  Energy dissipation in general purpose processors , 1995, 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers.

[30]  Hal Wasserman,et al.  Comparing algorithm for dynamic speed-setting of a low-power CPU , 1995, MobiCom '95.

[31]  David A. Rennels,et al.  Reducing the frequency of tag compares for low power I-cache design , 1995, ISLPED '95.

[32]  Kai Shen Instruction Level Parallelism , 1995, HICSS.

[33]  Anantha P. Chandrakasan,et al.  Low Power Digital CMOS Design , 1995 .

[34]  Sharad Malik,et al.  Instruction level power analysis and optimization of software , 1996, Proceedings of 9th International Conference on VLSI Design.

[35]  Jan M. Rabaey,et al.  Early power exploration—a World Wide Web application , 1996, DAC '96.