Run-time support for dynamically reconfigurable computing systems

Reconfigurable computing systems normally consist of an instruction-set processor connected to a block of reconfigurable logic. The reconfigurable logic, for example, an field programmable gate arrays (FPGA), can usually be adapted during the run-time of an application to perform different tasks. This paper describes a novel FPGA support system (FSS) that facilitates the execution of hardware-based tasks on a reconfigurable Xilinx 6264 FPGA connected to an ARM 7 processor. The FSS provides the mechanisms to support the placement, execution, and removal of tasks on the FPGA. A key feature of the FSS is the ability to provide communication facilities between concurrently active hardware and software tasks during the run-time of an application. The design, implementation and status of the FSS are discussed, together with initial results based on the implementation of a wavelet image compression application. The paper concludes by considering how our experiences with this system have influenced the development of an enhanced FSS for the later generation of Xilinx Virtex FPGAs.