A novel high-speed flip-flop circuit using RTDs and HEMTs

An RTD (resonant tunneling diode)-based flip-flop circuit with a new configuration is proposed. The circuit features an SCFL interface for both input and output, and achieves high-speed operation with a simplified configuration. The circuit consists of only two RTDs and three HEMTs, and works as a delayed flip-flop (D-FF) with return-to-zero (RZ) mode output. 50 Gbit/s operation is confirmed by SPICE simulation for the SCFL-interfaced D-FF with the proposed configuration. A static binary frequency divider (T-FF) is also designed based on the same concept. It is fabricated by InP-based RTD/HEMT integration technology, and its proper operation of up to 15 GHz is confirmed experimentally.

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