Key issues in evaluating hot-carrier reliability

Two key issues in evaluating the hot-carrier reliability of CMOS device technologies will be examined. First, the basis for establishing hot-carrier reliability criteria will be analyzed. The case will be made for incorporating information about circuit performance requirements and operating conditions into future hot-carrier reliability criteria rather than relying on more ambiguous criteria defined by device-performance requirements alone. Second, the impact of lower operating voltages on hot-carrier reliability criteria and models will be analyzed. An assessment will be made of the future significance and impact of hot-carrier degradation for future scaled CMOS technologies.

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