论文信息 - A 10 bit, 50 M sample/s, low power pipelined A/D converter for cable modem applications

A 10 bit, 50 M sample/s, low power pipelined A/D converter for cable modem applications

A pipelined A/D converter, suitable for cable modem applications is presented. The A/D converter implemented in a 0.25 /spl mu/m CMOS technology provides a resolution of 10 bits at a sampling rate of 50 MSample/s while dissipating 65 mW from 2.5 V supply voltage. The DNL and INL are -0.5 LSB and 0.95 LSB respectively and the peak SNDR is 57 dB. The total area of the prototype is 3.2 mm/sup 2/ and the core area of the A/D converter excluding pads is 1.2 mm/sup 2/.

C. Andre T. Salama | Sotoudeh Hamedi-Hagh

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