Clobber-NVM: log less, re-execute more
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[1] Sudarsun Kannan,et al. Durable Transactional Memory Can Scale with Timestone , 2020, ASPLOS.
[2] Qingrui Liu,et al. Compiler-Directed Failure Atomicity for Nonvolatile Memory , 2019 .
[3] Roy H. Campbell,et al. Consistent and Durable Data Structures for Non-Volatile Byte-Addressable Memory , 2011, FAST.
[4] Jian Xu,et al. NOVA: A Log-structured File System for Hybrid Volatile/Non-volatile Main Memories , 2016, FAST.
[5] Patrick Th. Eugster,et al. NVthreads: Practical Persistence for Multi-threaded Applications , 2017, EuroSys.
[6] Somesh Jha,et al. Static analysis and compiler design for idempotent processing , 2012, PLDI.
[7] Zhen Lin,et al. Exploring Memory Persistency Models for GPUs , 2019, 2019 28th International Conference on Parallel Architectures and Compilation Techniques (PACT).
[8] Michael M. Swift,et al. An Analysis of Persistent Memory Use with WHISPER , 2017, ASPLOS.
[9] Qin Jin,et al. Persistent B+-Trees in Non-Volatile Main Memory , 2015, Proc. VLDB Endow..
[10] Yan Solihin,et al. Hiding the long latency of persist barriers using speculative execution , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).
[11] Andreas Reuter,et al. Principles of transaction-oriented database recovery , 1983, CSUR.
[12] James R. Larus,et al. Fine-Grain Checkpointing with In-Cache-Line Logging , 2019, ASPLOS.
[13] Bingsheng He,et al. NV-Tree: Reducing Consistency Cost for NVM-based Single Level Systems , 2015, FAST.
[14] Adam Silberstein,et al. Benchmarking cloud serving systems with YCSB , 2010, SoCC '10.
[15] Jian Huang,et al. HOOP: Efficient Hardware-Assisted Out-of-Place Update for Non-Volatile Memory , 2020, 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA).
[16] Andreas Reuter,et al. Transaction Processing: Concepts and Techniques , 1992 .
[17] Binyu Zang,et al. Pisces: A Scalable and Efficient Persistent Transactional Memory , 2019, USENIX Annual Technical Conference.
[18] Michael L. Scott,et al. iDO: Compiler-Directed Failure Atomicity for Nonvolatile Memory , 2018, 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[19] Satish Narayanasamy,et al. Relaxed Persist Ordering Using Strand Persistency , 2020, 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA).
[20] Jim Ruppert,et al. A Delaunay Refinement Algorithm for Quality 2-Dimensional Mesh Generation , 1995, J. Algorithms.
[21] Thomas F. Wenisch,et al. High-Performance Transactions for Persistent Memories , 2016, ASPLOS.
[22] Weimin Zheng,et al. DudeTM: Building Durable Transactions with Decoupling for Persistent Memory , 2017, ASPLOS.
[23] Yoav Raz. The Principle of Commitment Ordering, or Guaranteeing Serializability in a Heterogeneous Environment of Multiple Autonomous Resource Mangers Using Atomic Commitment , 1992, VLDB.
[24] Hans-Juergen Boehm,et al. Atlas: leveraging locks for non-volatile memory consistency , 2014, OOPSLA.
[25] Thomas F. Wenisch,et al. Delegated persist ordering , 2016, 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[26] Pascal Felber,et al. Romulus: Efficient Algorithms for Persistent Transactional Memory , 2018, SPAA.
[27] Reem Elkhouly,et al. Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory , 2019, ACM Trans. Archit. Code Optim..
[28] Vikram S. Adve,et al. LLVM: a compilation framework for lifelong program analysis & transformation , 2004, International Symposium on Code Generation and Optimization, 2004. CGO 2004..
[29] Rajesh K. Gupta,et al. NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories , 2011, ASPLOS XVI.
[30] Terence Kelly,et al. Dalí: A Periodically Persistent Hash Map , 2017, DISC.
[31] Arpit Joshi,et al. Lazy Release Persistency , 2020, ASPLOS.
[32] Gottfried Vossen,et al. Transactional Information Systems: Theory, Algorithms, and the Practice of Concurrency Control and Recovery , 2002 .
[33] Kunle Olukotun,et al. STAMP: Stanford Transactional Applications for Multi-Processing , 2008, 2008 IEEE International Symposium on Workload Characterization.
[34] Michael M. Swift,et al. MOD: Minimally Ordered Durable Datastructures for Persistent Memory , 2019, ASPLOS.
[35] João Pedro Barreto,et al. Hardware Transactional Memory Meets Memory Persistency , 2018, 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS).
[36] Terence Kelly,et al. Failure-Atomic Persistent Memory Updates via JUSTDO Logging , 2016, ASPLOS.
[37] Lei Liu,et al. Efficient GPU NVRAM Persistence with Helper Warps , 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).
[38] Steve Scargall. Concurrency and Persistent Memory , 2020 .
[39] Peter J. Varman,et al. SoftWrAP: A lightweight framework for transactional support of storage class memory , 2015, 2015 31st Symposium on Mass Storage Systems and Technologies (MSST).
[40] Michael M. Swift,et al. Mnemosyne: lightweight persistent memory , 2011, ASPLOS XVI.
[41] Virendra J. Marathe,et al. Lock cohorting: a general technique for designing NUMA locks , 2012, PPoPP '12.
[42] Zhenwei Wu,et al. PMThreads: persistent memory threads harnessing versioned shadow copies , 2020, PLDI.
[43] Amar Phanishayee,et al. Atomic In-place Updates for Non-volatile Main Memories with Kamino-Tx , 2017, EuroSys.
[44] Maurice Herlihy,et al. A persistent lock-free queue for non-volatile memory , 2018, PPoPP.
[45] Steve Scargall. PMDK Internals: Important Algorithms and Data Structures , 2020 .