Board level drop reliability of MSP (multi stack package) composed of a logic chipset package at bottom and an MCP (multi chip package) at top was investigated. The reliability of the package was tested by a developed drop (shock) tester. Applied shock level was half sine shape with 1500 G peak acceleration and 0.5 msec duration time. Failures were detected by four daisy chain loops going through solder balls and traces on each package. All failures were observed at the bottom chipset solder ball. The locations of failed balls were observed by dye and pry technology. The detailed physics of failure was observed by cross sectioning. EDX analysis was carried out at the failed IMC (inter-metallic compound) layer and brittle fracture between Cu6 Sn5 and Cu3Sn was observed. Fluctuation of the test board was measured by an accelerometer, strain gage, and gap sensor. A modal test was performed to measure the natural frequency of the board. Complex phenomena during the short period of the drop were analyzed by numerical simulation; finite element method. A simplified beam and shell model was adopted to obtain the global motion of the board, and a three-dimensional continuum sub model was adopted for the detail analysis of the ball. Both axial force and bending moment on the solder were good failure parameters. Local stress analysis showed stress concentration at the edge of a solder ball. Modal dynamic analysis gave similar result to real time analysis and its computation time was 1/6 of implicit analysis
[1]
Ephraim Suhir.
Could shock tests adequately mimic drop test conditions?
,
2002,
52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).
[2]
Seung Mo Kim,et al.
A methodology for drop performance prediction and application for design optimization of chip scale packages
,
2005,
Proceedings Electronic Components and Technology, 2005. ECTC '05..
[3]
V.B.C. Tan,et al.
Finite element modeling of electronic packages subjected to drop impact
,
2005,
IEEE Transactions on Components and Packaging Technologies.
[4]
Ephraim Suhir.
Could Shock Tests Adequately Mimic Drop Test Conditions
,
2002
.
[5]
John W. Hutchinson,et al.
Dynamic Fracture Mechanics
,
1990
.
[6]
Dong Kil Shin,et al.
Fracture parameters of interfacial crack of bimaterial under the impact loading
,
2001
.
[7]
Hun Shen Ng,et al.
Development and application of innovational drop impact modeling techniques
,
2005,
Proceedings Electronic Components and Technology, 2005. ECTC '05..
[8]
E.H. Wong,et al.
Dynamic materials testing and modeling of solder interconnects
,
2004,
2004 Proceedings. 54th Electronic Components and Technology Conference (IEEE Cat. No.04CH37546).