A Novel Method for the Elimination of Dead Time in Two Level Voltage Source Inverter

Dead time is a short delay introduced between the gating signals of the upper and lower switches in an inverter leg to prevent the short circuit of dc link. Such dead time results in a change in f undamental voltage and also causes low frequency distortion. In this paper , a novel method for the elimination of dead time in two level voltage source inverter is proposed and implemented. This method reduces the low frequency distortion and results in a steady fundamental voltage. The validity of this method has been studied by the PSPICE Simulation and prototype experiment.

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