A 90nm 8b 120Ms/s-250Ms/s pipeline ADC

A dual operating mode 8b, 1.1V, 120 MHz/250 MHz, 9.4 mW/22.8 mW pipeline ADC for Gb Ethernet applications is presented. Considering 60 MHz of signal bandwidth in both operating modes, the ADC achieves a peak SNDR of 44.1dB/40.7dB (7b/6.5b ENOB), featuring a minimum FoM of 0.84 pJ/conv at 120 MHz and 2.2 pJ/conv at 250 MHz. A 90 nm CMOS technology was used to integrate the ADC whose active area is 1.25 times 0.65 mm2.

[1]  D.K. Su,et al.  A 150-MS/s 8-b 71-mW CMOS time-interleaved ADC , 2005, IEEE Journal of Solid-State Circuits.

[2]  Asad A. Abidi,et al.  A 10b 160MS/s 84mW 1V Subranging ADC in 90nm CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[3]  Tomohiko Ito,et al.  55-mW 1.2-V 12-bit 100-MSPS Pipeline ADCs for Wireless Receivers , 2006 .

[4]  Minkyu Song,et al.  Design of a 1.8V 6-bit 100MSPS 5mW CMOS A/D Converter with Low Power Folding-Interpolation Techniques , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.