The FISHEYE view: a new look at structured les

An input/output subsystem in which a peripheral device controller controls the device in response to commands received from an input/output (I/O) channel which is connected to a processor. A channel address word (CAW) and a sequence of channel command words (CCW's) are fetched from a main memory and executed by the I/O channel. If a delay condition such as a paging fault in a virtual memory occurs, the channel signals the device controller over an interface. In response to the signal, the device controller turns on a suspend latch and sets zero status which is returned to the I/O channel. After the paging fault or the delay condition has been corrected by the processor, the channel operation is continued by issuing a restart I/O instruction. In executing the restart I/O instruction, the channel turns on a restart latch and validates the previous CCW and CAW fetches. The channel program starts at the point where a command is gated to the device and since the restart latch is on, a command of zero is gated. A command of zero received at the I/O controller plus the condition that the suspend latch is on, causes the controller to resume the suspended operation at the point where it was discontinued. Since the previous CCW and CAW fetch have been validated, the control unit operation reenters the channel program at the point of suspension.