Generation of Related Performance Simulation Models at an Early Stage in the Design Cycle

In the early development stages of embedded systems, fundamental decisions concerning the system architecture and a proper hardware/software partition must be made. The choices determine, e.g. power consumption, performance, and other system features. For this reason, a method plus supporting tools for the fast, efficient, and automated evaluation of system design alternatives is required. In this contribution, we present the MIRA framework and a novel method based on Extended Queuing Network Models (EQN) linked to a set of simulation models for architectural exploration and hardware/software tradeoff analysis. The MIRA framework consists of hardware components expressed in XML and function represented as UML Activity Diagrams. Activity threads, introduced in this contribution, define building rules for the simulation models. This method fosters the combined simulation and analysis of system behavior as well as architectural exploration of design alternatives. As current experimental work and evaluation with non-trivial examples show, the presented method allows for fast and efficient generation of simulation models and an accurate prediction of performance measures

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