Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliability

This paper presents the description of direct hybrid bonding technology for the fabrication of vertical interconnects thanks to wafer-to-wafer bonding. Process robustness is analyzed through morphological and electrical results. The electrical characterizations are discussed versus hybrid bonding pad dimensions and pitches. Electromigration study is carried out on different test vehicles with hybrid bonding interconnect dimensions below 5 μm. Experimental tests provide the parameters for lifetime extrapolation and show that the hybrid bonding module is immune to electromigration failures. Finally perspectives and key challenges for 3D interconnects scalability are given.

[1]  K. Ohno,et al.  Novel stacked CMOS image sensor with advanced Cu2Cu hybrid bonding , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

[2]  L. Di Cioccio,et al.  Investigation of stress induced voiding and electromigration phenomena on direct copper bonding interconnects for 3D integration , 2011, 2011 International Electron Devices Meeting.

[3]  F. Fournel,et al.  Reliable 300 mm Wafer Level Hybrid Bonding for 3D Stacked CMOS Image Sensors , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[4]  Edith Beigné,et al.  Innovative structures to test bonding alignment and characterize high density interconnects in 3D-IC , 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

[5]  H. Moriceau,et al.  Water Stress Corrosion in Bonded Structures , 2015 .

[6]  E. Deloffre,et al.  <200 nm Wafer-to-wafer overlay accuracy in wafer level Cu/SiO2 hybrid bonding for BSI CIS , 2015, 2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).

[7]  David Bouchu,et al.  Mass Transport-Induced Failure of Hybrid Bonding-Based Integration for Advanced Image Sensor Applications , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[8]  Tadatomo Suga,et al.  Room-temperature direct bonding of CMP-Cu film for bumpless interconnection , 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

[9]  J. P. Gambino,et al.  Reliability of hybrid bond interconnects , 2017, 2017 IEEE International Interconnect Technology Conference (IITC).

[10]  Thomas Signamarcheix,et al.  Mechanisms of copper direct bonding observed by in-situ and quantitative transmission electron microscopy , 2013 .

[11]  Pierric Gueguen,et al.  Full characterization of Cu/Cu direct bonding for 3D integration , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[12]  L. Arnaud,et al.  1μm Pitch direct hybrid bonding with <300nm wafer-to-wafer overlay accuracy , 2017, 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

[13]  Maurice Rivoire,et al.  CMP Process Optimization for Bonding Applications , 2012 .

[14]  Eric Beyne,et al.  Ultra-Fine Pitch 3D Integration Using Face-to-Face Hybrid Wafer Bonding Combined with a Via-Middle Through-Silicon-Via Process , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[15]  Hubert Moriceau,et al.  Influence of water diffusion in deposited silicon oxides on direct bonding of hydrophilic surfaces , 2018 .

[16]  X. Garros,et al.  3D Sequential Integration: Application-driven technological achievements and guidelines , 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

[17]  V. Fiori,et al.  Cu/SiO2 hybrid bonding: Finite element modeling and experimental characterization , 2016, 2016 6th Electronic System-Integration Technology Conference (ESTC).

[18]  P. Batude,et al.  New challenges and opportunities for 3D integrations , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

[19]  Perceval Coudrain,et al.  Thermomechanical finite element modeling of Cu–SiO 2 direct hybrid bonding with a dishing effect on Cu surfaces , 2016 .

[20]  Pierric Gueguen,et al.  An Overview of Patterned Metal/Dielectric Surface Bonding: Mechanism, Alignment and Characterization , 2011 .

[21]  O. O. Okudur,et al.  Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology , 2017, 2017 IEEE International Electron Devices Meeting (IEDM).