Design of a Pre-Distortion Power Amplifier for Ku-Band/5G Applications

A 15 GHz power amplifier design for 5G applications is presented in this paper. The proposed power amplifier consists in a three-stage architecture. A low complex pre-distortion circuit is designed as the first stage. Since the CMOS process suffers from poor intrinsic gain (gm*ro), especially in the millimeter wave band, the Darlington pair driver stage is exploited to maximize the power gain. A FET-stack structure is used to enable high voltage operation and thus increase the output power. The proposed power amplifier is designed and simulated in a standard 130nm CMOS process. The simulation results show that the proposed power amplifier can attain 1dB compression point (P1dB) of 18.9 dBm with a power added efficiency (PAE) of 26% under 3.6 V and 1.8 V dual voltage supply.

[1]  Janne Aikio,et al.  A fully integrated 13 GHz CMOS SOI stacked power amplifier for 5G wireless systems , 2017, 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC).

[2]  Kimmo Hiltunen,et al.  5G trial system coverage evaluation utilizing multi-point transmission in 15 GHz frequency band , 2017, 2017 European Conference on Networks and Communications (EuCNC).

[3]  Kai Tang,et al.  A 13.5–19 GHz 20.6-dB Gain CMOS Power Amplifier for FMCW Radar Application , 2017, IEEE Microwave and Wireless Components Letters.

[4]  Hwann-Kaeo Chiou,et al.  An 18 to 33 GHz Fully-Integrated Darlington Power Amplifier With Guanella-Type Transmission-Line Transformers in 0.18 $\mu{\rm m}$ CMOS Technology , 2013, IEEE Microwave and Wireless Components Letters.

[5]  Brian A. Floyd,et al.  A 28-GHz Harmonic-Tuned Power Amplifier in 130-nm SiGe BiCMOS , 2017, IEEE Transactions on Microwave Theory and Techniques.

[6]  Hua Wang,et al.  A high-efficiency 5G K/Ka-band stacked power amplifier in 45nm CMOS SOI process supporting 9Gb/s 64-QAM modulation with 22.4% average PAE , 2017, 2017 Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS).

[7]  5G—THE MICROWAVE PERSPECTIVE , 2015 .

[8]  F. Aryanfar,et al.  A Broadband Stacked Power Amplifier in 45-nm CMOS SOI Technology , 2013, IEEE Journal of Solid-State Circuits.

[9]  James F. Buckwalter,et al.  A 14-GHz, 22-dBm Series Doherty Power Amplifier in 45-nm CMOS SOI , 2016, 2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).

[10]  Chih-Chun Shen,et al.  A Monolithic 3.5-to-6.5 GHz GaAs HBT-HEMT/Common-Emitter and Common-Gate Stacked Power Amplifier , 2012, IEEE Microwave and Wireless Components Letters.

[11]  Pilsoon Choi,et al.  A Novel 2.6–6.4 GHz Highly Integrated Broadband GaN Power Amplifier , 2017, IEEE Microwave and Wireless Components Letters.

[12]  Chung-Ching Lin,et al.  A 23.2 dBm linear power amplifier using pre-distortion technique for LTE applications , 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

[13]  Jenshan Lin,et al.  A Linearized Cascode CMOS Power Amplifier , 2006, 2006 IEEE Annual Wireless and Microwave Technology Conference.