A neural network embedded processor with a dynamically reconfigurable pipeline architecture
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Takayuki Morishita | Atsuo Inoue | S. Katsu | Tatsuo Otsuki | Gota Kano | Takami Satonaka | Youichi Tamura
[1] A. Iwata,et al. An artificial neural network accelerator using general purpose 24 bit floating point digital signal processors , 1989, International 1989 Joint Conference on Neural Networks.