Specifying RTL Properties

In this chapter, our goal is to introduce general concepts related to property specification. Then, we will apply these concepts as we introduce emerging RTL specification standards (that is, assertion libraries and languages). Initially, we compare and contrast the Accellera PSL 1.0 property spe cification language proposal [Accellera PSL-1.0 2003] with the Open Verification Library [Accellera OVL 2003]. We then introduce the proposed SystemVerilog 3.1 assertion constructs [Accellera SystemVerilog-3.1 2003]. Each of the assertion standards we discuss has its own merits. Our objective is to help the engineer understand the advantages (and limitations) of the various assertion forms and their usage model. This will prepare readers to select appropriate specification forms that suit their needs (or preferences).