A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors

Abstract Random Telegraph Noise (RTN) has attracted increasing interest in the last years. This phenomenon introduces variability in the electrical properties of transistors, in particular in deeply-scaled CMOS technologies, which can cause performance degradation in circuits. In this work, the dependence of RTN parameters, namely current jump amplitude and emission and capture time constants, on the bias conditions, both VG and VD, has been studied on a set of devices, with a high granularity in a broad voltage range. The results obtained for the VG dependences corroborate previous works, but suggest a unique trend for all the devices in a VG range that goes from the near-threshold region up to voltages over the nominal operation bias. However, different trends have been observed in the parameters dependence for the case of VD. From the experimental data, the probabilities of occupation of the associated defects have been evaluated, pointing out large device-to-device dispersion in the VD dependences.

[1]  T. Grasser,et al.  Impact of Mixed Negative Bias Temperature Instability and Hot Carrier Stress on MOSFET Characteristics—Part I: Experimental , 2019, IEEE Transactions on Electron Devices.

[2]  Jörg Henkel,et al.  Reliability in Super- and Near-Threshold Computing: A Unified Model of RTN, BTI, and PV , 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Marc Porti,et al.  Threshold voltage and on-current Variability related to interface traps spatial distribution , 2015, 2015 45th European Solid State Device Research Conference (ESSDERC).

[4]  Javier Martin-Martinez,et al.  Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits , 2020, IEEE Transactions on Instrumentation and Measurement.

[5]  A. Visconti,et al.  Comprehensive Analysis of Random Telegraph Noise Instability and Its Scaling in Deca–Nanometer Flash Memories , 2009, IEEE Transactions on Electron Devices.

[6]  M. Nelhiebel,et al.  Switching oxide traps as the missing link between negative bias temperature instability and random telegraph noise , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[7]  Ru Huang,et al.  Impacts of Random Telegraph Noise (RTN) on Digital Circuits , 2015, IEEE Transactions on Electron Devices.

[8]  B. Kaczer,et al.  A unified perspective of RTN and BTI , 2014, 2014 IEEE International Reliability Physics Symposium.

[9]  B. Kaczer,et al.  Degradation of time dependent variability due to interface state generation , 2013, 2013 Symposium on VLSI Technology.

[10]  M. Nafría,et al.  Probabilistic defect occupancy model for NBTI , 2011, 2011 International Reliability Physics Symposium.

[11]  Francisco V. Fernández,et al.  TARS: A toolbox for statistical reliability modeling of CMOS devices , 2017, 2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).

[12]  M. Dutoit,et al.  Random telegraph signals in deep submicron n-MOSFET's , 1994 .

[13]  Rafael Castro-Lopez,et al.  A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI , 2019, IEEE Journal of Solid-State Circuits.

[14]  K. Takeuchi,et al.  New analysis methods for comprehensive understanding of Random Telegraph Noise , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).