论文信息 - Fast transient response capacitor-free linear voltage regulator in 65nm CMOS

Fast transient response capacitor-free linear voltage regulator in 65nm CMOS

A fast transient response capacitor-free linear voltage regulator is presented. It provides an output voltage of 1.2V for supplying a digital signal processor with a load current of up to 200mA. The regulator incorporates both high static output voltage accuracy of better than 1% for six sigma design and fast transient response. A load jump from 1mA to 150mA with a rise time of 100ns causes an undershoot of only 90mV. The voltage regulator is implemented in a 65nm CMOS process. Because no external capacitor is required the proposed regulator is well suited for System on Chip designs.

Wolfgang Pribyl | Thomas Jackum | Gerhard Maderbacher | Roman Riederer

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