论文信息 - Test structure for characterizing capacitance matrix of multi-layer interconnections in VLSI

Test structure for characterizing capacitance matrix of multi-layer interconnections in VLSI

A compact new test structure using shift register circuits for extraction of components of the capacitance matrix of multilayer interconnections has been proposed. An extraction method for the capacitance matrix is also presented. As a result of fabrication, capacitance values obtained by measurement are in good agreement with numerical calculations. We also showed an estimation method for the measurement errors.

Kunihiro Asada | Hiroshi Ito | T. Mido

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