Semiconductor device and communication system that includes these.

A semiconductor device having a modulator for PSK communications and a semiconductor device having a demodulator for PSK-PSK communication and a communication system are provided. The semiconductor device includes a reference clock generator for generating a reference clock signal, a phase locked loop (PLL) for receiving the reference clock signal and for generating a first clock signal, an integer divide circuit for generating a second clock signal by delaying a rising edge of the reference clock signal by a product of a predetermined integer value, which is included in transmission data, and a phase interval, and a processing unit for generating a first transmission signal. The first transmission signal is phase-shifted from a rising edge of the second clock signal. The phase interval is dependent on a ratio of the frequency of the first clock to the frequency of the reference clock.