Higher-Order Abstraction in Hardware Descriptions with C?aSH

Synchronous hardware can be straight forwardly modelled as a function from input and (current) state to an updated state and output. The C?aSH compiler can translate such a transition function, described in a functional language, to synthesisable VHDL. Taking a hardware-oriented viewpoint, components can then be seen as an instantiation of such atransition function. An abstraction called Arrows is used to directly model components by combining a transition function and its state. The abstraction also provides an uniform interface for composition, without losing the referential transparency offered by a functional description. Furthermore, readability of hardware designs is increased by the use of the ?-syntax, that automatically composes components according to the Arrow interface. The advantages of the Arrow abstraction and the?-syntax are demonstrated by means of a realistic example circuit consisting of multiple components. This is a significant extension to C?aSH and enables many high level abstractions.

[1]  Florent de Dinechin,et al.  An FPGA-specific approach to floating-point accumulation and sum-of-products , 2008, 2008 International Conference on Field-Programmable Technology.

[2]  Jan Kuper,et al.  C?aSH: Structural Descriptions of Synchronous Hardware Using Haskell , 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.

[3]  Dennis W. Prather,et al.  FPGA-based, floating-point reduction operations , 2006 .

[4]  Erik Perrins,et al.  Introducing Kansas Lava , 2009, IFL.

[5]  Ross Paterson,et al.  Arrows and computation , 2009 .

[6]  Yan Zhang,et al.  An integrated reduction technique for a double precision accumulator , 2009, HPRCTA '09.

[7]  Viktor K. Prasanna,et al.  High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs , 2007, IEEE Transactions on Parallel and Distributed Systems.

[8]  Jan Kuper,et al.  Exercises in Architecture Specification Using CLaSH , 2010, FDL.

[9]  André B. J. Kokkeler,et al.  Streaming Reduction Circuit , 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

[10]  John Hughes Programming with Arrows , 2004, Advanced Functional Programming.

[11]  Ross Paterson,et al.  A new notation for arrows , 2001, ICFP '01.

[12]  M. Kooijman,et al.  Haskell as a higher order structural hardware description language , 2009 .

[13]  Tarmo Uustalu,et al.  Advanced Functional Programming, 5th International School, AFP 2004, Tartu, Estonia, August 14-21, 2004, Revised Lectures , 2005, Advanced Functional Programming.

[14]  Mary Sheeran,et al.  Lava: hardware design in Haskell , 1998, ICFP '98.

[15]  Axel Jantsch,et al.  System modeling and transformational design refinement in ForSyDe [formal system design] , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.