Place and route techniques for fpga architecture advancement

Efficient placement and routing algorithms play an important role in FPGA architecture research. Together, the place-and-route algorithms are responsible for producing a physical implementation of an application circuit on the FPGA hardware. The quality of the place-and-route algorithms has a direct bearing on the usefulness of the target FPGA architecture. The benefits of including powerful new features on an FPGA might be lost due to the inability of the place-and-route algorithms to fully exploit these features. Thus, the advancement of FPGA architectures relies heavily on the development of efficient place-and-route algorithms. The subject of this dissertation is the development of place and route techniques that could play an important role in FPGA architecture advancement. The work presented in this dissertation is divided into two topics: Architecture-Adaptive FPGA Placement. The first topic deals with the development of a universal placement algorithm (Independence) that adapts to the target FPGA architecture. We have successfully demonstrated Independence's adaptability to three different architectures. Our results also show that Independence is able to adapt to a class of routing-poor FPGA architectures. Pipelined Routing. The second topic focuses on the development of a routing algorithm (PipeRoute) that can be used to route application circuits on high-speed, pipelined FPGA architectures. In our experiments, PipeRoute was able to successfully route netlists on a coarse-grained pipelined architecture. The algorithm incurred a 20% overhead when compared to a realistic lower bound. We also used PipeRoute in an exploratory flow to find an architecture that was up to 19% better than a hand-architected pipelined architecture.