A 920 gate masterslice
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An MOS masterslice chip with up to 920 gates, 3W dissipation and 3ns/gate propagation delay time for random logic LSIs will be reported.
[1] Tsuneta Sudo,et al. A Subnanosecond Masterslice LSI Using Dielectric Isolation and Three Layer Metallization Technologies , 1978 .
[2] Akira Masaki,et al. 200-gate ECL master-slice LSI , 1974 .
[3] Yutaka Hayashi,et al. Diffusion Selfaligned MOST; A New Approach for High Speed Device , 1969 .
[4] Yutaka Hayashi,et al. Fully Ion Implanted DSA MOS IC , 1977 .