Gate oxide breakdown parameter extraction with ground and power supply signature measurements

Gate oxide breakdown (GOBD) is a serious reliability issue for MOS transistors. Wearout due to GOBD is traditionally modeled based on test structure data. In this paper, we present a method to determine the oxide degradation through ground and power signal signature measurements. We determine a relationship between the time-dependent ohmic resistance and the ground and power signature signal degradation and fit a model to the simulation results. Given an estimation of resistance from oxide degradation, we find the GOBD degradation model parameters. The methodology enables the extraction of GOBD model parameters for individual chips, not just for the manufacturing process, and hence it becomes possible to identify chips that are more vulnerable to GOBD.

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