Adaptive Bus Encoding Schemes for Power-Efficient Data Transfer in DSM Environments

Power dissipated on global DSM buses increasingly influences total chip power consumption. In order to reduce that portion, activity minimizing bus encoding schemes are applied. Thereby adaptive techniques have a higher potential in reducing transitions than static schemes. However, they are susceptible to rarely but occuring transmission errors since the encoding rule on decoder side is calculated from the received data. Once a different encoding rule is calculated there is no re-synchronization. In this paper we present a new approach which eliminates the dependency on the received data. The encoding rule of both, coder and decoder is updated by partial runtime reconfiguration. In combination with a static scheme we could achieve a reduction in activity of up to 26%. In comparism with an adaptive scheme the hardware requirements were reduced by up to 50%.

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