Petri Net Models of Metastable Operations in Latch Circuits

Data communications between concurrent processes often employ shared latch circuitry of some kind, the most basic being a simple flip-flop which is written by one process and read by another, providing an inter-process assignment operation of a single bit binary variable. When the processes concerned do not operate in a synchronised fashion, metastable transients are possible inside shared latches. A method of deriving discrete Petri net models for such latches, covering possible metastable behaviour, is proposed. Both the local onset of metastability and the effects of metastable input signals are considered in the representation.