Dynamic voltage scaling techniques for power efficient video decoding

This paper presents a comparison of power-aware video decoding techniques that utilize dynamic voltage scaling (DVS). These techniques reduce the power consumption of a processor by exploiting high frame variability within a video stream. This is done through scaling of the voltage and frequency of the processor during the video decoding process. However, DVS causes frame deadline misses due to inaccuracies in decoding time predictions and granularity of processor settings used. Four techniques were simulated and compared in terms of power consumption, accuracy, and deadline misses. In addition, this paper proposes the frame-data computation aware (FDCA) technique, which is a useful power-saving technique not only for stored video but also for real-time video applications. The FDCA method is compared with the GOP, Direct, and Dynamic methods, which tend to be more suited for stored video applications. The simulation results indicated that the Dynamic per-frame technique, where the decoding time prediction adapts to the particular video being decoded, provides the most power saving with performance comparable to the ideal case. On the other hand, the FDCA method consumes more power than the Dynamic method but can be used for stored video and real-time time video scenarios without the need for any preprocessing. Our findings also indicate that, in general, DVS improves power savings, but the number of deadline misses also increase as the number of available processor settings increases. More importantly, most of these deadline misses are within 10-20% of the playout interval and thus have minimal affect on video quality. However, video clips with high variability in frame complexities combined with inaccurate decoding time predictions may degrade the video quality. Finally, our results show that a processor with 13 voltage/frequency settings is sufficient to achieve near maximum performance with the experimental environment and the video workloads we have used.

[1]  Joan L. Mitchell,et al.  MPEG Video: Compression Standard , 1996 .

[2]  Krisztián Flautner,et al.  Automatic Performance Setting for Dynamic Voltage Scaling , 2001, MobiCom '01.

[3]  Thomas D. Burd,et al.  The simulation and evaluation of dynamic voltage scaling algorithms , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[4]  Sharad Malik,et al.  Compile-time dynamic voltage scaling settings: opportunities and limits , 2003, PLDI '03.

[5]  Trevor Mudge,et al.  Dynamic voltage scaling on a low-power microprocessor , 2001 .

[6]  Scott Shenker,et al.  Scheduling for reduced CPU energy , 1994, OSDI '94.

[7]  E. N. Elnozahy,et al.  Energy-Efficient Server Clusters , 2002, PACS.

[8]  Thomas D. Burd,et al.  Design issues for Dynamic Voltage Scaling , 2000, ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514).

[9]  Anantha P. Chandrakasan,et al.  Data driven signal processing: an approach for energy efficient computing , 1996, Proceedings of 1996 International Symposium on Low Power Electronics and Design.

[10]  Seongsoo Lee,et al.  Run-time power control scheme using software feedback loop for low-power real-time applications , 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

[11]  Trevor Pering,et al.  Energy Efficient Voltage Scheduling for Real-Time Operating Systems , 1998 .

[12]  Todd M. Austin,et al.  The SimpleScalar tool set, version 2.0 , 1997, CARN.

[13]  Hiroyuki Tomiyama,et al.  Instruction scheduling for power reduction in processor-based system design , 1998, Proceedings Design, Automation and Test in Europe.

[14]  A. Veidenbaum,et al.  Architectural and compiler strategies for dynamic power management in the COPPER project , 2001, 2001 Innovative Architecture for Future Generation High-Performance Processors and Systems.

[15]  Lars-Olof Burchard,et al.  Estimating decoding times of MPEG-2 video streams , 2000, Proceedings 2000 International Conference on Image Processing (Cat. No.00CH37101).

[16]  Rajesh Gupta,et al.  Profile-based dynamic voltage scheduling using program checkpoints , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[17]  Rami G. Melhem,et al.  Collaborative operating system and compiler power management for real-time applications , 2003, The 9th IEEE Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings..

[18]  Alan Jay Smith,et al.  Improving dynamic voltage scaling algorithms with PACE , 2001, SIGMETRICS '01.

[19]  Mahmut T. Kandemir,et al.  Influence of compiler optimizations on system power , 2000, Proceedings 37th Design Automation Conference.

[20]  Margaret Martonosi,et al.  Wattch: a framework for architectural-level power analysis and optimizations , 2000, Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201).

[21]  Narayanan Vijaykrishnan,et al.  Effect of compiler optimizations on memory energy , 2000, 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528).

[22]  Teresa H. Meng,et al.  A high-efficiency variable-voltage CMOS dynamic dc-dc switching regulator , 1997 .

[23]  Andreas G. Andreou,et al.  Low-voltage/low-power integrated circuits and systems : low-voltage mixed-signal circuits , 1999 .

[24]  Catherine H. Gebotys.  Low energy memory and register allocation using network flow , 1997, DAC.

[25]  Chansu Yu,et al.  Dynamic voltage scaling on MPEG decoding , 2001, Proceedings. Eighth International Conference on Parallel and Distributed Systems. ICPADS 2001.

[26]  Mahadev Satyanarayanan,et al.  PowerScope: a tool for profiling the energy usage of mobile applications , 1999, Proceedings WMCSA'99. Second IEEE Workshop on Mobile Computing Systems and Applications.

[27]  F. Sano,et al.  A 300 MIPS/W RISC core processor with variable supply-voltage scheme in variable threshold-voltage CMOS , 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

[28]  Diana Marculescu.  On the Use of Microarchitecture-Driven Dynamic Voltage Scaling , 2000 .

[29]  Srinivasan Keshav,et al.  Comparison of rate-based service disciplines , 1991, SIGCOMM '91.

[30]  Dongkun Shin,et al.  Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications , 2001, IEEE Des. Test Comput..

[31]  Seongsoo Lee,et al.  Run-time power control scheme using software feedback loop for low-power real-time application , 2000, ASP-DAC '00.

[32]  Chi-Ying Tsui,et al.  Low power architecture design and compilation techniques for high-performance processors , 1994, Proceedings of COMPCON '94.

[33]  Karthik Dantu,et al.  Frame-based dynamic voltage and frequency scaling for a MPEG decoder , 2002, ICCAD 2002.

[34]  Giovanni De Micheli,et al.  Comparing System-Level Power Management Policies , 2001, IEEE Des. Test Comput..

[35]  Manish Gupta,et al.  Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors , 2000, IEEE Micro.

[36]  Anantha P. Chandrakasan,et al.  Low Power Digital CMOS Design , 1995 .

[37]  Anantha Chandrakasan,et al.  Dynamic Power Management in Wireless Sensor Networks , 2001, IEEE Des. Test Comput..

[38]  Mahmut T. Kandemir,et al.  Using complete machine simulation for software power estimation: the SoftWatt approach , 2002, Proceedings Eighth International Symposium on High Performance Computer Architecture.

[39]  Mark Claypool,et al.  The effects of jitter on the peceptual quality of video , 1999, MULTIMEDIA '99.

[40]  Thomas D. Burd,et al.  Energy efficient CMOS microprocessor design , 1995, Proceedings of the Twenty-Eighth Annual Hawaii International Conference on System Sciences.

[41]  Ketan Mayer-Patel,et al.  Performance of a software MPEG video decoder , 1993, MULTIMEDIA '93.

[42]  Carla Schlatter Ellis,et al.  Energy estimation tools for the Palm , 2000, MSWIM '00.

[43]  Robert W. Brodersen,et al.  High-efficiency low-voltage dc-dc conversion for portable applications , 1994 .

[44]  Hiroto Yasuura,et al.  Voltage scheduling problem for dynamically variable voltage processors , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[45]  Gang Quan,et al.  Energy efficient fixed-priority scheduling for real-time systems on variable voltage processors , 2001, DAC '01.

[46]  Yoshio Turner,et al.  Reduced energy decoding of MPEG streams , 2003, Multimedia Systems.

[47]  Hal Wasserman,et al.  Comparing algorithm for dynamic speed-setting of a low-power CPU , 1995, MobiCom '95.

[48]  Luca Benini,et al.  Dynamic voltage scaling and power management for portable systems , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

[49]  Myungchul Kim,et al.  A Comparative Study of Dynamic Voltage Scaling Techniques for Low-Power Video Decoding , 2003, Embedded Systems and Applications.

[50]  Mahmut T. Kandemir,et al.  The design and use of simplePower: a cycle-accurate energy estimation tool , 2000, Proceedings 37th Design Automation Conference.

[51]  Larry L. Peterson,et al.  Predicting MPEG execution times , 1998, SIGMETRICS '98/PERFORMANCE '98.

[52]  Richard Levine,et al.  3G Wireless Demystified , 2001 .

[53]  Narayanan Vijaykrishnan,et al.  Compiler optimizations for low power systems , 2002 .

[54]  Sharad Malik,et al.  Instruction level power analysis and optimization of software , 1996, J. VLSI Signal Process..

[55]  Jae-Won Shin.  Real Time Content Based Dynamic Voltage Scaling , 2002 .

[56]  Massoud Pedram,et al.  Low power design methodologies , 1996 .

[57]  R.W. Brodersen,et al.  A dynamic voltage scaled microprocessor system , 2000, IEEE Journal of Solid-State Circuits.

[58]  Soonhoi Ha,et al.  Dynamic voltage scheduling technique for low-power multimedia applications using buffers , 2001, ISLPED '01.

[59]  Ralf Steinmetz,et al.  Human Perception of Jitter and Media Synchronization , 1996, IEEE J. Sel. Areas Commun..

[60]  Mark Claypool,et al.  An empirical study of realvideo performance across the internet , 2001, IMW '01.

[61]  Johan Pouwelse,et al.  POWER-AWARE VIDEO DECODING , 2005 .