Power amplifier driver for SDR transmitter with high gain tuning range and dynamic power control
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Hao Min | Na Yan | Xi Tan | Yilei Li | Kefeng Han | Hao Min | N. Yan | Xi Tan | Kefeng Han | Yilei Li
[1] Saska Lindfors,et al. A 240-MHz Low-Pass Filter With Variable Gain in 65-nm CMOS for a UWB Radio Receiver , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[2] Santiago Celma,et al. High linear digitally programmable gain amplifier , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[3] K. F. Lee,et al. Impact of distributed gate resistance on the performance of MOS devices , 1994 .
[4] Hiroyuki Kobayashi,et al. An all-digital 8-DPSK polar transmitter with second-order approximation scheme and phase rotation-constant digital PA for bluetooth EDR in 65nm CMOS , 2011, 2011 IEEE International Solid-State Circuits Conference.
[5] Dong Zhao,et al. A Dual-Band CMOS Transceiver for 3G TD-SCDMA , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
[6] Giuseppe Palmisano,et al. High-dynamic-range decibel-linear IF variable-gain amplifier with temperature compensation for WCDMA applications , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[7] Domine M. W. Leenaerts,et al. A 2.4-GHz 0.18-/spl mu/m CMOS self-biased cascode power amplifier , 2003 .