论文信息 - Smart-substrate multichip-module systems

Smart-substrate multichip-module systems

This implementation strategy enables incremental test of all system components, providing an alternative solution to the known good die testing problem. The authors present a simple microcontroller emulator designed and fabricated for study of the test logic needed as a key component of this method.<<ETX>>

[1] R. J. Wagner,et al. High-yield assembly of multichip modules through known-good IC's and effective test strategies , 1992, Proc. IEEE.

[2] Rodham E. Tulloss,et al. The Test Access Port and Boundary Scan Architecture , 1990 .

[3] Wojciech Maly. Prospects for WSI: a manufacturing perspective , 1992, Computer.

[4] Wojciech Maly,et al. Are there any alternatives to "known good die" ? /spl lsqb/MCMs/spl rsqb/ , 1994, Proceedings of IEEE Multi-Chip Module Conference (MCMC-94).

[5] W. M. Siu. MCM and monolithic VLSI perspectives on dependencies, integration, performance and economics , 1992, Proceedings 1992 IEEE Multi-Chip Module Conference MCMC-92.

[6] Paul D. Franzon,et al. A multichip module design process for notebook computers , 1993, Computer.

[7] J. F. McDonald,et al. The trials of wafer-scale integration: Although major technical problems have been overcome since WSI was first tried in the 1960s, commercial companies can't yet make it fly , 1984, IEEE Spectrum.

[8] Wojciech Maly,et al. Built-in current testing-feasibility study , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[9] W. David Ballew,et al. Board-level boundary scan: regaining observability with an additional IC , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..