Low complexity parallel Chien search architecture for RS decoder

This paper presents a group-based optimization scheme for a parallel Chien search circuit in a RS (Reed-Solomon) (255,239) decoder. A novel global optimization algorithm (GOA) is presented to find out the common modulo 2 additions within groups of a Galois field (GF) multiplier. By pre-computing the common items, group-based GOA can reduce the area of parallel Chien search circuit by 44% compared to 23% if applying GOA to GF multipliers separately. The group-based optimization scheme can be widely used in a general parallel architecture in which a lot of GF multipliers are involved.

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