On the use of greedy shapers in real-time embedded systems

Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these properties, shapers also play an increasingly important role in the design of multiprocessor embedded systems that exhibit a considerable amount of on-chip traffic. Despite the growing importance of traffic shapping in this area, no methods exist for analyzing shapers in distributed embedded systems and for incorporating them into a system-level performance analysis. Until now it was not possible to determine the effect of shapers on end-to-end delay guarantees or buffer requirements in such systems. In this work, we present a method for analyzing greedy shapers, and we embed this analysis method into a well-established modular performance analysis framework for real-time embedded systems. The presented approach enables system-level performance analysis of complete systems with greedy shapers, and we prove its applicability by analyzing three case study systems.

[1]  Jay K. Strosnider,et al.  The Deferrable Server Algorithm for Enhanced Aperiodic Responsiveness in Hard Real-Time Environments , 1987, IEEE Trans. Computers.

[2]  Albert G. Greenberg,et al.  Scalable Architectures for Integrated Traffic Shaping and Link Scheduling in High-Speed ATM Switches , 1997, IEEE J. Sel. Areas Commun..

[3]  Lui Sha,et al.  Solutions for Some Practical Problems in Prioritized Preemptive Scheduling , 1986, RTSS.

[4]  Insup Lee,et al.  Compositional real-time scheduling framework , 2004, 25th IEEE International Real-Time Systems Symposium.

[5]  Lothar Thiele,et al.  Real-time calculus for scheduling hard real-time systems , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[6]  Rene L. Cruz,et al.  A calculus for network delay, Part I: Network elements in isolation , 1991, IEEE Trans. Inf. Theory.

[7]  Lothar Thiele,et al.  Performance evaluation of network processor architectures: combining simulation with analytical estimation , 2003, Comput. Networks.

[8]  Lothar Thiele,et al.  A general framework for analysing system properties in platform-based embedded system designs , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[9]  Lothar Thiele,et al.  Performance analysis of greedy shapers in real-time systems , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[10]  J. Javier Gutiérrez,et al.  MAST: Modeling and Analysis Suite for Real Time Applications , 2001, ECRTS.

[11]  Lothar Thiele,et al.  Real-time interfaces for interface-based design of real-time systems with fixed priority scheduling , 2005, EMSOFT.

[12]  Henrik Schiøler,et al.  CyNC - towards a General Tool for Performance Analysis of Complex Distributed Real Time Systems , 2005 .

[13]  Marcel Verhoef,et al.  System architecture evaluation using modular performance analysis: a case study , 2006, International Journal on Software Tools for Technology Transfer.

[14]  Petru Eles,et al.  Schedulability analysis and optimization for the synthesis of multi-cluster distributed embedded systems , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[15]  Rolf Ernst,et al.  A Formal Approach to MpSoC Performance Verification , 2003, Computer.

[16]  B. Basch,et al.  Traffic shaping, bandwidth allocation, and quality assessment for MPEG video distribution over broadband networks , 1998 .

[17]  Jean-Yves Le Boudec,et al.  Network Calculus: A Theory of Deterministic Queuing Systems for the Internet , 2001 .

[18]  Insup Lee,et al.  Periodic resource model for compositional real-time guarantees , 2003, RTSS 2003. 24th IEEE Real-Time Systems Symposium, 2003.

[19]  ThieleLothar,et al.  On the use of greedy shapers in real-time embedded systems , 2012 .

[20]  Lothar Thiele,et al.  Interface-Based Design of Real-Time Systems with Hierarchical Scheduling , 2006, 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'06).