SPARC-V9 Architecture Specification with Rapide

This report presents an approach to creating an executable standard for the SPARC-V9 instruction set architecture using Rapide-1.0, a language for modeling and prototyping distributed systems. It describes the desired characteristics of a formal specification of the architecture and shows how Rapide can be used to build a model with these characteristics. This is followed by the description of a simple prototype of the proposed model, and a discussion of the issues involved in building and testing the complete specification (with emphasis on some Rapide-specific features such as constraints, causality and mapping). The report concludes with a brief evaluation of the proposed model and suggestions on future areas of research.

[1]  Bjarne Stroustrup,et al.  C++ Programming Language , 1986, IEEE Softw..

[2]  D. Luckham,et al.  ANNA: towards a language for annotating Ada programs , 1980, SIGPLAN.

[3]  Laurence Pierre,et al.  Formal proofs from HDL descriptions , 1993 .

[4]  Barry J. Epstein,et al.  The Sparc Architecture Manual/Version 8 , 1992 .

[5]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[6]  David L Weaver,et al.  The SPARC architecture manual : version 9 , 1994 .

[7]  David C. Luckham,et al.  Three Concepts of System Architecture , 1995 .

[8]  I. G. BONNER CLAPPISON.  Editor , 1960, The Electric Power Engineering Handbook - Five Volume Set.

[9]  Alec G. Stanculescu,et al.  Hardware design and simulation in VAL/VHDL , 1991, The Kluwer international series in engineering and computer science.

[10]  Donald E. Thomas,et al.  The Verilog® Hardware Description Language , 1990 .

[11]  John P. Gray.  Introduction to Silicon Compilation , 1979, 16th Design Automation Conference.

[12]  Mario Barbacci,et al.  Instruction set processor specifications (ISPS): The notation and its applications , 1981, IEEE Transactions on Computers.