Low Power FPGA Implementation
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[1] Tughrul Arslan,et al. On the low-power implementation of FIR filtering structures on single multiplier DSPs , 2002 .
[2] B. M. Gordon,et al. Supply and threshold voltage scaling for low power CMOS , 1997, IEEE J. Solid State Circuits.
[3] Saibal Mukhopadhyay,et al. Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits , 2003, Proc. IEEE.
[4] Viktor K. Prasanna,et al. Time and Energy Efficient Matrix Factorization Using FPGAs , 2003, FPL.
[5] K. Keutzer,et al. On average power dissipation and random pattern testability of CMOS combinational logic networks , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.
[6] O. Kenneth. Introduction to the 1996 Bipolar/BiCMOS Circuits and Technology Meeting Special Issue , 1997 .
[7] James D. Meindl,et al. A physical alpha-power law MOSFET model , 1999 .
[8] James C. Browne,et al. Systems Engineering for High Performance Computing Software: The HDDA/DAGH Infrastructure for Implementation of Parallel Structured Adaptive Mesh , 2000 .
[9] Mahmut T. Kandemir,et al. Leakage Current: Moore's Law Meets Static Power , 2003, Computer.
[10] Farid N. Najm,et al. High-level area and power estimation for VLSI circuits , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).
[11] Sujit Dey,et al. Register transfer level power optimization with emphasis on glitch analysis and reduction , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[12] Wayne Luk,et al. The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays , 2004, FPL.
[13] Tughrul Arslan,et al. High throughput FIR filter design for low power SoC applications , 2000, Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).
[14] J. Tukey,et al. An algorithm for the machine calculation of complex Fourier series , 1965 .