Fabrication of Ramp-Edge Junctions With High $I_{\rm c}R_{\rm n}$ Products by Using Cu-Poor Precursor

We have fabricated ramp-edge Josephson junctions using a Cu-poor oxide layer as a precursor of the barrier. La<sub>0.2</sub> - Y<sub>0.9</sub>Ba<sub>1.9</sub>Cu<sub>3</sub>O<sub>x</sub>(La-YBCO) and La<sub>0.2</sub> - Yb<sub>0.9</sub>Ba<sub>1.9</sub>Cu<sub>3</sub>O<sub>x</sub> (La-YbBCO) were used for the base-electrode and the counter-electrode, respectively. A Cu-poor precursor was deposited on a pattered base-electrode at a substrate temperature (T<sub>s</sub>) of approximately 660 degC by a pulsed laser deposition (PLD) method employing deposition conditions different from those for the counter-electrode layer. The fabricated junctions on a La-YBCO ground plane showed resistively and capacitively shunted junction-type current-voltage characteristics. They exhibited the products of the critical current (I<sub>c</sub>) and the junction resistance (R<sub>n</sub>) higher than 3 mV and excess current ratio less than 30% at 4.2 K. The I<sub>c</sub>R<sub>n</sub> products were nearly 1.5 times larger than those for junctions with an interface-modified barrier in a temperature range of 4-50 K. The junctions had a barrier region with the thickness of approximately 1 nm and a Cu-poor transition region narrower than that for the latter type of junctions.

[1]  K. Char,et al.  Properties of interface-engineered high Tc Josephson junctions , 1997 .

[2]  Shuichi Tahara,et al.  Fabrication Processes for High-T~c Superconducting Integrated Circuits Based on Edge-Type Josephson Junctions , 1998 .

[3]  T. Nagano,et al.  Characterization of ramp-type Josephson junctions with a Co-doped PrBaCuO barrier , 1999, IEEE Transactions on Applied Superconductivity.

[4]  S. Tahara,et al.  High-temperature superconducting edge-type Josephson junctions with modified interface barriers , 1999 .

[5]  K. Char,et al.  Properties of YBa2Cu3O7−x/YBa2Cu2.79Co0.21O7−x/YBa2 Cu3O7−x edge junctions , 1994 .

[6]  Y. Ishimaru,et al.  Improvement in reproducibility of multilayer and junction process for HTS SFQ circuits , 2005, IEEE Transactions on Applied Superconductivity.

[7]  Keiichi Tanabe,et al.  Identification of different phases in barriers of interface-engineered ramp-edge Josephson junctions: Formation mechanisms and influences on electrical properties , 2002 .

[8]  Keiichi Tanabe,et al.  Development of Thin Film Multilayer Structures with Smooth Surfaces for HTS SFQ Circuits , 2005, IEICE Trans. Electron..

[9]  K. Char,et al.  The effect of microstructure on the electrical properties of YBCO interface-engineered Josephson junctions , 1999 .

[10]  M. Hidaka,et al.  High-temperature superconducting edge-type Josephson junctions with modified interfaces , 1999, IEEE Transactions on Applied Superconductivity.

[11]  H. Rogalla,et al.  Ramp‐type junction parameter control by Ga doping of PrBa2Cu3O7−δ barriers , 1996 .

[12]  H. Rogalla,et al.  YBa2Cu3Ox/PrBa2Cu3Ox/YBa2Cu3Ox Josephson ramp junctions , 1992 .