Design of Accelerators with Hard Embedded Blocks

In modern FPGAs, the digital circuitry common to many applications are being embedded as hard embedded blocks to utilize silicon area efficiently. Use of HEBs improves the overall performance of hardware implemented using FPGA, as the interconnect delays are also reduced. In this chapter, we discuss how HEBs are designed using the methodology described in Chap. 3. We study the impact of HEBs on the execution time of the two bioinformatics applications; Protein docking and Genome assembly. In Chaps. 4 and 5, we had studied the acceleration of these applications using currently available FPGAs. In this chapter, we discuss the identification and design of respective HEBs to get performance benefits. We also show how we can estimate application speedups using these future FPGA fabrics incorporating these HEBs.

[1]  Brent E. Nelson,et al.  Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture , 2002, FPL.

[2]  B. Flachs,et al.  A streaming processing unit for a CELL processor , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[3]  Rayan Chikhi,et al.  Mapsembler, targeted and micro assembly of large NGS datasets on a desktop computer , 2012, BMC Bioinformatics.

[4]  Peter Jamieson,et al.  Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]  Sri Parameswaran,et al.  Flexible multi-mode embedded floating-point unit for field programmable gate arrays , 2009, FPGA '09.

[6]  Wayne Luk,et al.  Optimizing coarse-grained units in floating point hybrid FPGA , 2008, 2008 International Conference on Field-Programmable Technology.

[7]  Karl S. Hemmert,et al.  Embedded floating-point units in FPGAs , 2006, FPGA '06.

[8]  Nachiket Kapre,et al.  SPICE²: A Spatial, Parallel Architecture for Accelerating the Spice Circuit Simulator , 2011 .

[9]  M. Balakrishnan,et al.  Accelerating Genome Assembly Using Hard Embedded Blocks in FPGAs , 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

[10]  B. Hoefflinger.  ITRS: The International Technology Roadmap for Semiconductors , 2011 .

[11]  M. Balakrishnan,et al.  Accelerating 3D-FFT Using Hard Embedded Blocks in FPGAs , 2013, 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems.

[12]  Bairong Shen,et al.  A Practical Comparison of De Novo Genome Assembly Software Tools for Next-Generation Sequencing Technologies , 2011, PloS one.

[13]  Wayne Luk,et al.  Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications , 2007, 2007 International Conference on Field Programmable Logic and Applications.

[14]  Wayne Luk,et al.  Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs , 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

[15]  Steven G. Johnson,et al.  The Design and Implementation of FFTW3 , 2005, Proceedings of the IEEE.

[16]  Francesc X. Avilés,et al.  A Computational System for Modeling Flexible Protein-Protein and protein-DNA Docking , 1998, ISMB.