An Interactive Verification Tool for Synchronous/Reactive Systems
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[1] Gérard Berry,et al. The Esterel Synchronous Programming Language: Design, Semantics, Implementation , 1992, Sci. Comput. Program..
[2] Klaus Schneider,et al. Separate compilation for synchronous programs , 2009, SCOPES.
[3] Tobias Schüle,et al. A Verified Compiler for Synchronous Programs with Local Declarations , 2006, SLAP@ETAPS.
[4] Ralf Reetz. Deep Embedding VHDL , 1995, TPHOLs.
[5] Thomas A. Henzinger,et al. Decomposing refinement proofs using assume-guarantee reasoning , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).
[6] Helmut Veith,et al. 25 Years of Model Checking - History, Achievements, Perspectives , 2008, 25 Years of Model Checking.
[7] Robin Milner,et al. Edinburgh lcf: a mechanized logic of computation , 1978 .
[8] Klaus Schneider,et al. The Synchronous Programming Language Quartz , 2009 .
[9] Mark R. Greenstreet,et al. Formal verification in hardware design: a survey , 1999, TODE.
[10] Jean-Raymond Abrial,et al. Modeling in event-b - system and software engineering by Jean-Raymond Abrial , 2010, SOEN.
[11] Aarti Gupta,et al. Formal hardware verification methods: A survey , 1992, Formal Methods Syst. Des..
[12] Michael J. C. Gordon,et al. The semantic challenge of Verilog HDL , 1995, Proceedings of Tenth Annual IEEE Symposium on Logic in Computer Science.
[13] Stephen A. Edwards,et al. The Synchronous Languages Twelve Years Later , 1997 .
[14] Klaus Schneider,et al. A hoare calculus for the verification of synchronous languages , 2012, PLPV '12.
[15] Natarajan Shankar,et al. PVS: A Prototype Verification System , 1992, CADE.
[16] Manuel Gesell,et al. Interactive verification of synchronous systems , 2012, Tenth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMCODE2012).
[17] Klaus Schneider,et al. Proving the Equivalence of Microstep and Macrostep Semantics , 2002, TPHOLs.
[18] Klaus Schneider,et al. Embedding imperative synchronous languages in interactive theorem provers , 2001, Proceedings Second International Conference on Application of Concurrency to System Design.
[19] Thomas Kropf,et al. Structuring and automating hardware proofs in a higher-order theorem-proving environment , 1993, Formal Methods Syst. Des..
[20] Klaus Schneider,et al. A HOL Conversion for Translating Linear Time Temporal Logic to omega-Automata , 1999, TPHOLs.
[21] Bernd Finkbeiner,et al. Verifying Temporal Properties of Reactive Systems: A STeP Tutorial , 2000, Formal Methods Syst. Des..
[22] T. Melham. Automating recursive type definitions in higher order logic , 1989 .
[23] Michael J. C. Gordon,et al. Why higher-order logic is a good formalism for specifying and verifying hardware , 1985 .
[24] Michael J. C. Gordon,et al. Reachability Programming in HOL98 Using BDDs , 2000, TPHOLs.