Memory-processor interface with hybridCMOS-RSFQ echnology

Abstract The lack of high density memories at 4 K has severely constrained the applications of digital Josephson electronics. Superconductor–semiconductor hybrid technology can take advantage of the high speed of a superconductor processor and the high density of a semiconductor memory and make superconducting electronics applicable. Currently we are developing a hybrid memory system to achieve low power (135 mW) and high speed (128 Gb/s) data access between a 16 GHz 8-bit superconducting rapid single flux quantum (RSFQ) vector processor and a 512 kbit complimentary metal-oxide silicon (CMOS) memory system. In this paper, we give a detailed description of both the high-level system organization and low-level circuit design, as well as simulation and test results for some circuit components of this hybrid RSFQ–CMOS memory-processor interface.