DYNAMEM — A microarchitecture for improving memory disambiguation at run-time

This paper presents a new microarchitecture technique named DYNAMEM, in which memory reference instructions are dynamically scheduled and can be executed out-of-order. Load instructions can bypass store instructions speculatively, even if the store instructions’ addresses are unknown. DYNAMEM can greatly alleviate the restraints of ambiguous memory dependencies. Simulation results show that the frequency of false load is low. Mechanism has been provided to repair false loads with low penalty, and to achieve precise interrupts. Discussions and experimental results show that DYNAMEM could dramatically raise instruction-level parallelism in programs without recompilation.

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